KVM: PPC: e500mc support
Add processor support for e500mc, using hardware virtualization support (GS-mode). Current issues include: - No support for external proxy (coreint) interrupt mode in the guest. Includes work by Ashish Kalra <Ashish.Kalra@freescale.com>, Varun Sethi <Varun.Sethi@freescale.com>, and Liu Yu <yu.liu@freescale.com>. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
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@@ -168,6 +168,7 @@ extern const char *powerpc_base_platform;
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#define CPU_FTR_LWSYNC ASM_CONST(0x0000000008000000)
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#define CPU_FTR_NOEXECUTE ASM_CONST(0x0000000010000000)
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#define CPU_FTR_INDEXED_DCR ASM_CONST(0x0000000020000000)
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#define CPU_FTR_EMB_HV ASM_CONST(0x0000000040000000)
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/*
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* Add the 64-bit processor unique features in the top half of the word;
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@@ -386,11 +387,11 @@ extern const char *powerpc_base_platform;
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CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
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#define CPU_FTRS_E500MC (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
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CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC)
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CPU_FTR_DBELL | CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
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#define CPU_FTRS_E5500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
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CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
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CPU_FTR_DEBUG_LVL_EXC)
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CPU_FTR_DEBUG_LVL_EXC | CPU_FTR_EMB_HV)
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#define CPU_FTRS_E6500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
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CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
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CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
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@@ -539,6 +540,7 @@ enum {
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#ifdef CONFIG_PPC_E500MC
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CPU_FTRS_E500MC & CPU_FTRS_E5500 & CPU_FTRS_E6500 &
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#endif
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~CPU_FTR_EMB_HV & /* can be removed at runtime */
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CPU_FTRS_POSSIBLE,
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};
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#endif /* __powerpc64__ */
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