[PATCH] 1/5 powerpc: Rework PowerMac i2c part 1
This is the first part of a rework of the PowerMac i2c code. It completely reworks the "low_i2c" layer. It is now more flexible, supports KeyWest, SMU and PMU i2c busses, and provides functions to match device nodes to i2c busses and adapters. This patch also extends & fix some bugs in the SMU driver related to i2c support and removes the clock spreading hacks from the pmac feature code rather than adapting them to the new API since they'll be replaced by the platform function code completely in patch 3/5 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
Bu işleme şunda yer alıyor:
Benjamin Herrenschmidt
işlemeyi yapan:
Paul Mackerras
Paul Mackerras
ebeveyn
002ec58eb5
işleme
730745a5c4
@@ -197,7 +197,6 @@ static int pmu_adb_reset_bus(void);
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#endif /* CONFIG_ADB */
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static int init_pmu(void);
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static int pmu_queue_request(struct adb_request *req);
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static void pmu_start(void);
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static irqreturn_t via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs);
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static irqreturn_t gpio1_interrupt(int irq, void *arg, struct pt_regs *regs);
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@@ -1802,258 +1801,6 @@ pmu_present(void)
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return via != 0;
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}
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struct pmu_i2c_hdr {
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u8 bus;
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u8 mode;
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u8 bus2;
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u8 address;
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u8 sub_addr;
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u8 comb_addr;
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u8 count;
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};
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int
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pmu_i2c_combined_read(int bus, int addr, int subaddr, u8* data, int len)
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{
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struct adb_request req;
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struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
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int retry;
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int rc;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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hdr->bus = bus;
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hdr->address = addr & 0xfe;
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hdr->mode = PMU_I2C_MODE_COMBINED;
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hdr->bus2 = 0;
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hdr->sub_addr = subaddr;
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hdr->comb_addr = addr | 1;
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hdr->count = len;
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req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.data[0] = PMU_I2C_CMD;
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req.reply[0] = 0xff;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_OK)
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break;
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mdelay(15);
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}
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if (req.reply[0] != PMU_I2C_STATUS_OK)
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return -1;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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mdelay(15);
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hdr->bus = PMU_I2C_BUS_STATUS;
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req.reply[0] = 0xff;
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req.nbytes = 2;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.data[0] = PMU_I2C_CMD;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
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memcpy(data, &req.reply[1], req.reply_len - 1);
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return req.reply_len - 1;
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}
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}
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return -1;
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}
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int
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pmu_i2c_stdsub_write(int bus, int addr, int subaddr, u8* data, int len)
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{
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struct adb_request req;
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struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
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int retry;
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int rc;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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hdr->bus = bus;
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hdr->address = addr & 0xfe;
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hdr->mode = PMU_I2C_MODE_STDSUB;
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hdr->bus2 = 0;
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hdr->sub_addr = subaddr;
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hdr->comb_addr = addr & 0xfe;
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hdr->count = len;
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req.data[0] = PMU_I2C_CMD;
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memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
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req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.reply[0] = 0xff;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_OK)
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break;
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mdelay(15);
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}
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if (req.reply[0] != PMU_I2C_STATUS_OK)
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return -1;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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mdelay(15);
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hdr->bus = PMU_I2C_BUS_STATUS;
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req.reply[0] = 0xff;
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req.nbytes = 2;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.data[0] = PMU_I2C_CMD;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_OK)
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return len;
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}
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return -1;
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}
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int
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pmu_i2c_simple_read(int bus, int addr, u8* data, int len)
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{
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struct adb_request req;
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struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
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int retry;
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int rc;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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hdr->bus = bus;
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hdr->address = addr | 1;
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hdr->mode = PMU_I2C_MODE_SIMPLE;
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hdr->bus2 = 0;
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hdr->sub_addr = 0;
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hdr->comb_addr = 0;
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hdr->count = len;
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req.data[0] = PMU_I2C_CMD;
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req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.reply[0] = 0xff;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_OK)
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break;
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mdelay(15);
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}
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if (req.reply[0] != PMU_I2C_STATUS_OK)
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return -1;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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mdelay(15);
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hdr->bus = PMU_I2C_BUS_STATUS;
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req.reply[0] = 0xff;
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req.nbytes = 2;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.data[0] = PMU_I2C_CMD;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
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memcpy(data, &req.reply[1], req.reply_len - 1);
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return req.reply_len - 1;
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}
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}
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return -1;
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}
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int
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pmu_i2c_simple_write(int bus, int addr, u8* data, int len)
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{
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struct adb_request req;
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struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
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int retry;
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int rc;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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hdr->bus = bus;
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hdr->address = addr & 0xfe;
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hdr->mode = PMU_I2C_MODE_SIMPLE;
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hdr->bus2 = 0;
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hdr->sub_addr = 0;
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hdr->comb_addr = 0;
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hdr->count = len;
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req.data[0] = PMU_I2C_CMD;
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memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
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req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.reply[0] = 0xff;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_OK)
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break;
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mdelay(15);
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}
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if (req.reply[0] != PMU_I2C_STATUS_OK)
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return -1;
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for (retry=0; retry<16; retry++) {
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memset(&req, 0, sizeof(req));
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mdelay(15);
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hdr->bus = PMU_I2C_BUS_STATUS;
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req.reply[0] = 0xff;
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req.nbytes = 2;
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req.reply_expected = 0;
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req.reply_len = 0;
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req.data[0] = PMU_I2C_CMD;
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rc = pmu_queue_request(&req);
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if (rc)
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return rc;
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while(!req.complete)
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pmu_poll();
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if (req.reply[0] == PMU_I2C_STATUS_OK)
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return len;
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}
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return -1;
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}
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#ifdef CONFIG_PM
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static LIST_HEAD(sleep_notifiers);
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@@ -2358,9 +2105,6 @@ pmac_suspend_devices(void)
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return -EBUSY;
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}
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/* Disable clock spreading on some machines */
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pmac_tweak_clock_spreading(0);
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/* Stop preemption */
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preempt_disable();
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@@ -2431,9 +2175,6 @@ pmac_wakeup_devices(void)
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mdelay(10);
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preempt_enable();
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/* Re-enable clock spreading on some machines */
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pmac_tweak_clock_spreading(1);
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/* Resume devices */
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device_resume();
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@@ -3150,16 +2891,13 @@ static int __init init_pmu_sysfs(void)
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subsys_initcall(init_pmu_sysfs);
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EXPORT_SYMBOL(pmu_request);
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EXPORT_SYMBOL(pmu_queue_request);
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EXPORT_SYMBOL(pmu_poll);
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EXPORT_SYMBOL(pmu_poll_adb);
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EXPORT_SYMBOL(pmu_wait_complete);
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EXPORT_SYMBOL(pmu_suspend);
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EXPORT_SYMBOL(pmu_resume);
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EXPORT_SYMBOL(pmu_unlock);
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EXPORT_SYMBOL(pmu_i2c_combined_read);
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EXPORT_SYMBOL(pmu_i2c_stdsub_write);
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EXPORT_SYMBOL(pmu_i2c_simple_read);
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EXPORT_SYMBOL(pmu_i2c_simple_write);
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#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
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EXPORT_SYMBOL(pmu_enable_irled);
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EXPORT_SYMBOL(pmu_battery_count);
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