powerpc/time: refactor MFTB() to limit number of ifdefs

The 8xx cannot access the TBL and TBU registers using mfspr/mtspr
It must be accessed using mftb/mftbu

Due to this, there is a number of places with #ifdef CONFIG_8xx

This patch defines new macros MFTBL(x) and MFTBU(x) on the same model
as MFTB(x) and tries to make use of them as much as possible.

In arch/powerpc/include/asm/timex.h, we also remove the ifdef
for the asm() operands as the compiler doesn't mind unused operands

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Цей коміт міститься в:
Christophe Leroy
2017-08-08 13:58:50 +02:00
зафіксовано Michael Ellerman
джерело de41ef6e4d
коміт 72e4b2cdf0
5 змінених файлів з 25 додано та 35 видалено

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@@ -80,4 +80,12 @@
.long 0xa6037b7d; /* mtsrr1 r11 */ \
.long 0x2400004c /* rfid */
#ifdef CONFIG_PPC_8xx
#define MFTBL(dest) mftb dest
#define MFTBU(dest) mftbu dest
#else
#define MFTBL(dest) mfspr dest, SPRN_TBRL
#define MFTBU(dest) mfspr dest, SPRN_TBRU
#endif
#endif /* _PPC64_PPC_ASM_H */

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@@ -71,32 +71,18 @@ udelay:
add r4,r4,r5
addi r4,r4,-1
divw r4,r4,r5 /* BUS ticks */
#ifdef CONFIG_8xx
1: mftbu r5
mftb r6
mftbu r7
#else
1: mfspr r5, SPRN_TBRU
mfspr r6, SPRN_TBRL
mfspr r7, SPRN_TBRU
#endif
1: MFTBU(r5)
MFTBL(r6)
MFTBU(r7)
cmpw 0,r5,r7
bne 1b /* Get [synced] base time */
addc r9,r6,r4 /* Compute end time */
addze r8,r5
#ifdef CONFIG_8xx
2: mftbu r5
#else
2: mfspr r5, SPRN_TBRU
#endif
2: MFTBU(r5)
cmpw 0,r5,r8
blt 2b
bgt 3f
#ifdef CONFIG_8xx
mftb r6
#else
mfspr r6, SPRN_TBRL
#endif
MFTBL(r6)
cmpw 0,r6,r9
blt 2b
3: blr