ucc_geth: migrate ucc_geth to phylib
migrate ucc_geth to use the common phylib code. There are several side effects from doing this: o deprecate 'interface' property specification present in some old device tree source files in favour of a split 'max-speed' and 'interface-type' description to appropriately match definitions in include/linux/phy.h. Note that 'interface' property is still honoured if max-speed or interface-type are not present (backward compatible). o compile-time CONFIG_UGETH_HAS_GIGA is eliminated in favour of probe time speed derivation logic. o adjust_link streamlined to only operate on maccfg2 and upsmr.r10m, instead of reapplying static initial values related to the interface-type. o Addition of UEC MDIO of_platform driver requires platform code add 'mdio' type to id list prior to calling of_platform_bus_probe (separate patch). o ucc_struct_init introduced to reduce ucc_geth_startup complexity. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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committed by
Jeff Garzik

parent
a999589cca
commit
728de4c927
@@ -28,6 +28,8 @@
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#include <asm/ucc.h>
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#include <asm/ucc_fast.h>
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#include "ucc_geth_mii.h"
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#define NUM_TX_QUEUES 8
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#define NUM_RX_QUEUES 8
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#define NUM_BDS_IN_PREFETCHED_BDS 4
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@@ -36,15 +38,6 @@
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#define ENET_INIT_PARAM_MAX_ENTRIES_RX 9
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#define ENET_INIT_PARAM_MAX_ENTRIES_TX 8
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struct ucc_mii_mng {
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u32 miimcfg; /* MII management configuration reg */
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u32 miimcom; /* MII management command reg */
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u32 miimadd; /* MII management address reg */
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u32 miimcon; /* MII management control reg */
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u32 miimstat; /* MII management status reg */
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u32 miimind; /* MII management indication reg */
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} __attribute__ ((packed));
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struct ucc_geth {
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struct ucc_fast uccf;
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@@ -53,7 +46,7 @@ struct ucc_geth {
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u32 ipgifg; /* interframe gap reg. */
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u32 hafdup; /* half-duplex reg. */
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u8 res1[0x10];
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struct ucc_mii_mng miimng; /* MII management structure */
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u8 miimng[0x18]; /* MII management structure moved to _mii.h */
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u32 ifctl; /* interface control reg */
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u32 ifstat; /* interface statux reg */
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u32 macstnaddr1; /* mac station address part 1 reg */
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@@ -381,66 +374,6 @@ struct ucc_geth {
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#define UCCS_MPD 0x01 /* Magic Packet
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Detected */
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/* UCC GETH MIIMCFG (MII Management Configuration Register) */
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#define MIIMCFG_RESET_MANAGEMENT 0x80000000 /* Reset
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management */
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#define MIIMCFG_NO_PREAMBLE 0x00000010 /* Preamble
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suppress */
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#define MIIMCFG_CLOCK_DIVIDE_SHIFT (31 - 31) /* clock divide
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<< shift */
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#define MIIMCFG_CLOCK_DIVIDE_MAX 0xf /* clock divide max val
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_2 0x00000000 /* divide by 2 */
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_4 0x00000001 /* divide by 4 */
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_6 0x00000002 /* divide by 6 */
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_8 0x00000003 /* divide by 8 */
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_10 0x00000004 /* divide by 10
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_14 0x00000005 /* divide by 14
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_16 0x00000008 /* divide by 16
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_20 0x00000006 /* divide by 20
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_28 0x00000007 /* divide by 28
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_32 0x00000009 /* divide by 32
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_48 0x0000000a /* divide by 48
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_64 0x0000000b /* divide by 64
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_80 0x0000000c /* divide by 80
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*/
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_112 0x0000000d /* divide by
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112 */
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_160 0x0000000e /* divide by
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160 */
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#define MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_224 0x0000000f /* divide by
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224 */
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/* UCC GETH MIIMCOM (MII Management Command Register) */
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#define MIIMCOM_SCAN_CYCLE 0x00000002 /* Scan cycle */
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#define MIIMCOM_READ_CYCLE 0x00000001 /* Read cycle */
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/* UCC GETH MIIMADD (MII Management Address Register) */
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#define MIIMADD_PHY_ADDRESS_SHIFT (31 - 23) /* PHY Address
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<< shift */
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#define MIIMADD_PHY_REGISTER_SHIFT (31 - 31) /* PHY Register
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<< shift */
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/* UCC GETH MIIMCON (MII Management Control Register) */
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#define MIIMCON_PHY_CONTROL_SHIFT (31 - 31) /* PHY Control
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<< shift */
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#define MIIMCON_PHY_STATUS_SHIFT (31 - 31) /* PHY Status
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<< shift */
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/* UCC GETH MIIMIND (MII Management Indicator Register) */
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#define MIIMIND_NOT_VALID 0x00000004 /* Not valid */
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#define MIIMIND_SCAN 0x00000002 /* Scan in
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progress */
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#define MIIMIND_BUSY 0x00000001
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/* UCC GETH IFSTAT (Interface Status Register) */
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#define IFSTAT_EXCESS_DEFER 0x00000200 /* Excessive
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transmission
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@@ -1009,15 +942,6 @@ struct ucc_geth_hardware_statistics {
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register */
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#define UCC_GETH_MACCFG1_INIT 0
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#define UCC_GETH_MACCFG2_INIT (MACCFG2_RESERVED_1)
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#define UCC_GETH_MIIMCFG_MNGMNT_CLC_DIV_INIT \
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(MIIMCFG_MANAGEMENT_CLOCK_DIVIDE_BY_112)
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/* Ethernet speed */
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enum enet_speed {
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ENET_SPEED_10BT, /* 10 Base T */
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ENET_SPEED_100BT, /* 100 Base T */
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ENET_SPEED_1000BT /* 1000 Base T */
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};
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/* Ethernet Address Type. */
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enum enet_addr_type {
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@@ -1026,22 +950,6 @@ enum enet_addr_type {
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ENET_ADDR_TYPE_BROADCAST
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};
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/* TBI / MII Set Register */
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enum enet_tbi_mii_reg {
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ENET_TBI_MII_CR = 0x00, /* Control (CR ) */
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ENET_TBI_MII_SR = 0x01, /* Status (SR ) */
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ENET_TBI_MII_ANA = 0x04, /* AN advertisement (ANA ) */
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ENET_TBI_MII_ANLPBPA = 0x05, /* AN link partner base page ability
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(ANLPBPA) */
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ENET_TBI_MII_ANEX = 0x06, /* AN expansion (ANEX ) */
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ENET_TBI_MII_ANNPT = 0x07, /* AN next page transmit (ANNPT ) */
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ENET_TBI_MII_ANLPANP = 0x08, /* AN link partner ability next page
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(ANLPANP) */
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ENET_TBI_MII_EXST = 0x0F, /* Extended status (EXST ) */
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ENET_TBI_MII_JD = 0x10, /* Jitter diagnostics (JD ) */
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ENET_TBI_MII_TBICON = 0x11 /* TBI control (TBICON ) */
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};
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/* UCC GETH 82xx Ethernet Address Recognition Location */
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enum ucc_geth_enet_address_recognition_location {
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UCC_GETH_ENET_ADDRESS_RECOGNITION_LOCATION_STATION_ADDRESS,/* station
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@@ -1239,8 +1147,7 @@ struct ucc_geth_info {
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u16 pausePeriod;
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u16 extensionField;
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u8 phy_address;
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u32 board_flags;
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u32 phy_interrupt;
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u32 mdio_bus;
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u8 weightfactor[NUM_TX_QUEUES];
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u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES];
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u8 l2qt[UCC_GETH_VLAN_PRIORITY_MAX];
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@@ -1249,7 +1156,6 @@ struct ucc_geth_info {
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u8 iphoffset[TX_IP_OFFSET_ENTRY_MAX];
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u16 bdRingLenTx[NUM_TX_QUEUES];
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u16 bdRingLenRx[NUM_RX_QUEUES];
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enum enet_interface enet_interface;
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enum ucc_geth_num_of_station_addresses numStationAddresses;
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enum qe_fltr_largest_external_tbl_lookup_key_size
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largestexternallookupkeysize;
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@@ -1326,9 +1232,11 @@ struct ucc_geth_private {
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/* index of the first skb which hasn't been transmitted yet. */
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u16 skb_dirtytx[NUM_TX_QUEUES];
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struct work_struct tq;
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struct timer_list phy_info_timer;
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struct ugeth_mii_info *mii_info;
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struct phy_device *phydev;
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phy_interface_t phy_interface;
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int max_speed;
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uint32_t msg_enable;
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int oldspeed;
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int oldduplex;
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int oldlink;
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