clk: bcm2835: add missing PLL clock dividers
Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eric Anholt <eric@anholt.net>
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Eric Anholt

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@@ -45,3 +45,8 @@
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#define BCM2835_CLOCK_PERI_IMAGE 29
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#define BCM2835_CLOCK_PWM 30
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#define BCM2835_CLOCK_PCM 31
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#define BCM2835_PLLA_DSI0 32
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#define BCM2835_PLLA_CCP2 33
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#define BCM2835_PLLD_DSI0 34
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#define BCM2835_PLLD_DSI1 35
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