phy: exynos-mipi-video: Add support for Exynos 5420 and 5433 SoCs
This patch adds support for MIPI DPHYs found in Exynos5420-compatible (5420, 5422 and 5800) and Exynos5433 SoCs. Those SoCs differs from earlier by different offset of MIPI DPHY registers in PMU controllers (Exynos 5420-compatible case) or by moving MIPI DPHY reset registers to separate system register controllers (Exynos 5433 case). In both case also additional 5th PHY (MIPI CSIS 2) has been added. Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
此提交包含在：
Marek Szyprowski
提交者
Kishon Vijay Abraham I
Kishon Vijay Abraham I
父節點
97a3042f76
當前提交
71f5c63c07
@@ -1,7 +1,7 @@
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/*
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* Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
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*
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* Copyright (C) 2013 Samsung Electronics Co., Ltd.
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* Copyright (C) 2013,2016 Samsung Electronics Co., Ltd.
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* Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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@@ -13,6 +13,7 @@
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon/exynos4-pmu.h>
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#include <linux/mfd/syscon/exynos5-pmu.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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@@ -28,11 +29,15 @@ enum exynos_mipi_phy_id {
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EXYNOS_MIPI_PHY_ID_DSIM0,
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EXYNOS_MIPI_PHY_ID_CSIS1,
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EXYNOS_MIPI_PHY_ID_DSIM1,
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EXYNOS_MIPI_PHY_ID_CSIS2,
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EXYNOS_MIPI_PHYS_NUM
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};
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enum exynos_mipi_phy_regmap_id {
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EXYNOS_MIPI_REGMAP_PMU,
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EXYNOS_MIPI_REGMAP_DISP,
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EXYNOS_MIPI_REGMAP_CAM0,
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EXYNOS_MIPI_REGMAP_CAM1,
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EXYNOS_MIPI_REGMAPS_NUM
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};
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@@ -96,6 +101,122 @@ static const struct mipi_phy_device_desc s5pv210_mipi_phy = {
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},
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};
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static const struct mipi_phy_device_desc exynos5420_mipi_phy = {
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.num_regmaps = 1,
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.regmap_names = {"syscon"},
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.num_phys = 5,
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.phys = {
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{
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/* EXYNOS_MIPI_PHY_ID_CSIS0 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
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.resetn_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
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.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
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}, {
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/* EXYNOS_MIPI_PHY_ID_DSIM0 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = EXYNOS5_MIPI_PHY_M_RESETN,
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.resetn_reg = EXYNOS5420_MIPI_PHY0_CONTROL,
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.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
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}, {
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/* EXYNOS_MIPI_PHY_ID_CSIS1 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM1,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
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.resetn_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
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.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
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}, {
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/* EXYNOS_MIPI_PHY_ID_DSIM1 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS1,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = EXYNOS5_MIPI_PHY_M_RESETN,
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.resetn_reg = EXYNOS5420_MIPI_PHY1_CONTROL,
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.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
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}, {
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/* EXYNOS_MIPI_PHY_ID_CSIS2 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5420_MIPI_PHY2_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = EXYNOS5_MIPI_PHY_S_RESETN,
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.resetn_reg = EXYNOS5420_MIPI_PHY2_CONTROL,
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.resetn_map = EXYNOS_MIPI_REGMAP_PMU,
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},
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},
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};
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#define EXYNOS5433_SYSREG_DISP_MIPI_PHY 0x100C
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#define EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON 0x1014
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#define EXYNOS5433_SYSREG_CAM1_MIPI_DPHY_CON 0x1020
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static const struct mipi_phy_device_desc exynos5433_mipi_phy = {
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.num_regmaps = 4,
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.regmap_names = {
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"samsung,pmu-syscon",
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"samsung,disp-sysreg",
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"samsung,cam0-sysreg",
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"samsung,cam1-sysreg"
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},
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.num_phys = 5,
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.phys = {
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{
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/* EXYNOS_MIPI_PHY_ID_CSIS0 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_DSIM0,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5433_MIPI_PHY0_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = BIT(0),
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.resetn_reg = EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON,
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.resetn_map = EXYNOS_MIPI_REGMAP_CAM0,
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}, {
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/* EXYNOS_MIPI_PHY_ID_DSIM0 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_CSIS0,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5433_MIPI_PHY0_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = BIT(0),
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.resetn_reg = EXYNOS5433_SYSREG_DISP_MIPI_PHY,
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.resetn_map = EXYNOS_MIPI_REGMAP_DISP,
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}, {
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/* EXYNOS_MIPI_PHY_ID_CSIS1 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5433_MIPI_PHY1_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = BIT(1),
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.resetn_reg = EXYNOS5433_SYSREG_CAM0_MIPI_DPHY_CON,
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.resetn_map = EXYNOS_MIPI_REGMAP_CAM0,
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}, {
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/* EXYNOS_MIPI_PHY_ID_DSIM1 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5433_MIPI_PHY1_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = BIT(1),
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.resetn_reg = EXYNOS5433_SYSREG_DISP_MIPI_PHY,
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.resetn_map = EXYNOS_MIPI_REGMAP_DISP,
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}, {
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/* EXYNOS_MIPI_PHY_ID_CSIS2 */
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.coupled_phy_id = EXYNOS_MIPI_PHY_ID_NONE,
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.enable_val = EXYNOS5_PHY_ENABLE,
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.enable_reg = EXYNOS5433_MIPI_PHY2_CONTROL,
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.enable_map = EXYNOS_MIPI_REGMAP_PMU,
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.resetn_val = BIT(0),
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.resetn_reg = EXYNOS5433_SYSREG_CAM1_MIPI_DPHY_CON,
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.resetn_map = EXYNOS_MIPI_REGMAP_CAM1,
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},
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},
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};
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struct exynos_mipi_video_phy {
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struct regmap *regmaps[EXYNOS_MIPI_REGMAPS_NUM];
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@@ -241,6 +362,12 @@ static const struct of_device_id exynos_mipi_video_phy_of_match[] = {
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{
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.compatible = "samsung,s5pv210-mipi-video-phy",
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.data = &s5pv210_mipi_phy,
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}, {
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.compatible = "samsung,exynos5420-mipi-video-phy",
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.data = &exynos5420_mipi_phy,
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}, {
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.compatible = "samsung,exynos5433-mipi-video-phy",
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.data = &exynos5433_mipi_phy,
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},
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{ /* sentinel */ },
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};
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