powerpc/mm: Merge various PTE bits and accessors definitions
Now that they are almost identical, we can merge some of the definitions related to the PTE format into common files. This creates a new pte-common.h which is included by both 32 and 64-bit right after the CPU specific pte-*.h file, and which defines some bits to "default" values if they haven't been defined already, and then provides a generic definition of most of the bit combinations based on these and exposed to the rest of the kernel. I also moved to the common pgtable.h most of the "small" accessors to the PTE bits and modification helpers (pte_mk*). The actual accessors remain in their separate files. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Benjamin Herrenschmidt
@@ -97,174 +97,11 @@ extern int icache_44x_need_flush;
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#include <asm/pte-hash32.h>
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#endif
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/* If _PAGE_SPECIAL is defined, then we advertise our support for it */
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#ifdef _PAGE_SPECIAL
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#define __HAVE_ARCH_PTE_SPECIAL
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#endif
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/*
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* Some bits are only used on some cpu families... Make sure that all
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* the undefined gets defined as 0
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*/
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#ifndef _PAGE_HASHPTE
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#define _PAGE_HASHPTE 0
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#endif
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#ifndef _PTE_NONE_MASK
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#define _PTE_NONE_MASK 0
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#endif
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#ifndef _PAGE_SHARED
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#define _PAGE_SHARED 0
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#endif
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#ifndef _PAGE_HWWRITE
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#define _PAGE_HWWRITE 0
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#endif
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#ifndef _PAGE_HWEXEC
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#define _PAGE_HWEXEC 0
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#endif
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#ifndef _PAGE_EXEC
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#define _PAGE_EXEC 0
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#endif
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#ifndef _PAGE_ENDIAN
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#define _PAGE_ENDIAN 0
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#endif
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#ifndef _PAGE_COHERENT
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#define _PAGE_COHERENT 0
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#endif
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#ifndef _PAGE_WRITETHRU
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#define _PAGE_WRITETHRU 0
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#endif
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#ifndef _PAGE_SPECIAL
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#define _PAGE_SPECIAL 0
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#endif
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#ifndef _PMD_PRESENT_MASK
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#define _PMD_PRESENT_MASK _PMD_PRESENT
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#endif
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#ifndef _PMD_SIZE
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#define _PMD_SIZE 0
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#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE()
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#endif
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#ifndef _PAGE_KERNEL_RO
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#define _PAGE_KERNEL_RO 0
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#endif
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#ifndef _PAGE_KERNEL_RW
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#define _PAGE_KERNEL_RW (_PAGE_DIRTY | _PAGE_RW | _PAGE_HWWRITE)
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#endif
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#define _PAGE_HPTEFLAGS _PAGE_HASHPTE
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/* Location of the PFN in the PTE. Most platforms use the same as _PAGE_SHIFT
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* here (ie, naturally aligned). Platform who don't just pre-define the
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* value so we don't override it here
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*/
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#ifndef PTE_RPN_SHIFT
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#define PTE_RPN_SHIFT (PAGE_SHIFT)
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#endif
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#ifdef CONFIG_PTE_64BIT
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#define PTE_RPN_MAX (1ULL << (64 - PTE_RPN_SHIFT))
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#define PTE_RPN_MASK (~((1ULL<<PTE_RPN_SHIFT)-1))
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#else
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#define PTE_RPN_MAX (1UL << (32 - PTE_RPN_SHIFT))
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#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
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#endif
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/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
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* pgprot changes
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*/
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#define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
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_PAGE_ACCESSED | _PAGE_SPECIAL)
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/* Mask of bits returned by pte_pgprot() */
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#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \
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_PAGE_WRITETHRU | _PAGE_ENDIAN | \
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_PAGE_USER | _PAGE_ACCESSED | \
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_PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \
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_PAGE_EXEC | _PAGE_HWEXEC)
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/*
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* We define 2 sets of base prot bits, one for basic pages (ie,
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* cacheable kernel and user pages) and one for non cacheable
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* pages. We always set _PAGE_COHERENT when SMP is enabled or
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* the processor might need it for DMA coherency.
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*/
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#if defined(CONFIG_SMP) || defined(CONFIG_PPC_STD_MMU)
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#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
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#else
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#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
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#endif
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#define _PAGE_BASE_NC (_PAGE_PRESENT | _PAGE_ACCESSED)
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/* Permission masks used for kernel mappings */
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#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW)
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#define PAGE_KERNEL_NC __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NO_CACHE)
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#define PAGE_KERNEL_NCG __pgprot(_PAGE_BASE_NC | _PAGE_KERNEL_RW | \
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_PAGE_NO_CACHE | _PAGE_GUARDED)
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#define PAGE_KERNEL_X __pgprot(_PAGE_BASE | _PAGE_KERNEL_RW | _PAGE_EXEC)
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#define PAGE_KERNEL_RO __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO)
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#define PAGE_KERNEL_ROX __pgprot(_PAGE_BASE | _PAGE_KERNEL_RO | _PAGE_EXEC)
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#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
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defined(CONFIG_KPROBES)
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/* We want the debuggers to be able to set breakpoints anywhere, so
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* don't write protect the kernel text */
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_X
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#else
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#define PAGE_KERNEL_TEXT PAGE_KERNEL_ROX
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#endif
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#define PAGE_NONE __pgprot(_PAGE_BASE)
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#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
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#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
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#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW)
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#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC)
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#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
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#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
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/*
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* The PowerPC can only do execute protection on a segment (256MB) basis,
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* not on a page basis. So we consider execute permission the same as read.
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* Also, write permissions imply read permissions.
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* This is the closest we can get..
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*/
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY_X
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY_X
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#define __P100 PAGE_READONLY
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#define __P101 PAGE_READONLY_X
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#define __P110 PAGE_COPY
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#define __P111 PAGE_COPY_X
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY_X
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED_X
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#define __S100 PAGE_READONLY
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#define __S101 PAGE_READONLY_X
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#define __S110 PAGE_SHARED
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#define __S111 PAGE_SHARED_X
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/* And here we include common definitions */
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#include <asm/pte-common.h>
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#ifndef __ASSEMBLY__
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/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a
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* kernel without large page PMD support */
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extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
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/*
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* Conversions between PTE values and page frame numbers.
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*/
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#define pte_pfn(x) (pte_val(x) >> PTE_RPN_SHIFT)
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PTE_RPN_SHIFT) |\
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pgprot_val(prot))
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#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
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#endif /* __ASSEMBLY__ */
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#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0)
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#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
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#define pte_clear(mm, addr, ptep) \
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do { pte_update(ptep, ~_PAGE_HASHPTE, 0); } while (0)
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@@ -273,43 +110,6 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
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#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK)
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#define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0)
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#ifndef __ASSEMBLY__
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
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static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
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static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
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static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
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static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
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static inline pte_t pte_wrprotect(pte_t pte) {
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pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; }
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static inline pte_t pte_mkclean(pte_t pte) {
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pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; }
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static inline pte_t pte_mkold(pte_t pte) {
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pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
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static inline pte_t pte_mkwrite(pte_t pte) {
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pte_val(pte) |= _PAGE_RW; return pte; }
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static inline pte_t pte_mkdirty(pte_t pte) {
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pte_val(pte) |= _PAGE_DIRTY; return pte; }
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static inline pte_t pte_mkyoung(pte_t pte) {
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pte_val(pte) |= _PAGE_ACCESSED; return pte; }
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static inline pte_t pte_mkspecial(pte_t pte) {
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pte_val(pte) |= _PAGE_SPECIAL; return pte; }
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static inline pgprot_t pte_pgprot(pte_t pte)
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{
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return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
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}
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
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return pte;
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}
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/*
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* When flushing the tlb entry for a page, we also need to flush the hash
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* table entry. flush_hash_pages is assembler (for speed) in hashtable.S.
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