Merge tag 'asoc-v5.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: More changes for v5.1 Another batch of changes for ASoC, no big core changes - it's mainly small fixes and improvements for individual drivers. - A big refresh and cleanup of the Samsung drivers, fixing a number of issues which allow the driver to be used with a wider range of userspaces. - Fixes for the Intel drivers to make them more standard so less likely to get bitten by core issues. - New driver for Cirrus Logic CS35L26.
此提交包含在:
@@ -186,8 +186,9 @@ enum i2s_datlen {
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#define STM32_I2S_IS_SLAVE(x) ((x)->ms_flg == I2S_MS_SLAVE)
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/**
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* struct stm32_i2s_data - private data of I2S
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* @regmap_conf: I2S register map configuration pointer
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* @egmap: I2S register map pointer
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* @regmap: I2S register map pointer
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* @pdev: device data pointer
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* @dai_drv: DAI driver pointer
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* @dma_data_tx: dma configuration data for tx channel
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@@ -200,6 +201,7 @@ enum i2s_datlen {
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* @base: mmio register base virtual address
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* @phys_addr: I2S registers physical base address
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* @lock_fd: lock to manage race conditions in full duplex mode
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* @irq_lock: prevent race condition with IRQ
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* @dais_name: DAI name
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* @mclk_rate: master clock frequency (Hz)
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* @fmt: DAI protocol
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@@ -221,6 +223,7 @@ struct stm32_i2s_data {
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void __iomem *base;
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dma_addr_t phys_addr;
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spinlock_t lock_fd; /* Manage race conditions for full duplex */
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spinlock_t irq_lock; /* used to prevent race condition with IRQ */
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char dais_name[STM32_I2S_DAI_NAME_SIZE];
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unsigned int mclk_rate;
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unsigned int fmt;
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@@ -246,8 +249,8 @@ static irqreturn_t stm32_i2s_isr(int irq, void *devid)
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return IRQ_NONE;
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}
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regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG,
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I2S_IFCR_MASK, flags);
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regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
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I2S_IFCR_MASK, flags);
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if (flags & I2S_SR_OVR) {
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dev_dbg(&pdev->dev, "Overrun\n");
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@@ -262,8 +265,10 @@ static irqreturn_t stm32_i2s_isr(int irq, void *devid)
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if (flags & I2S_SR_TIFRE)
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dev_dbg(&pdev->dev, "Frame error\n");
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if (err)
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spin_lock(&i2s->irq_lock);
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if (err && i2s->substream)
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snd_pcm_stop_xrun(i2s->substream);
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spin_unlock(&i2s->irq_lock);
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return IRQ_HANDLED;
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}
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@@ -276,7 +281,6 @@ static bool stm32_i2s_readable_reg(struct device *dev, unsigned int reg)
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case STM32_I2S_CFG2_REG:
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case STM32_I2S_IER_REG:
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case STM32_I2S_SR_REG:
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case STM32_I2S_IFCR_REG:
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case STM32_I2S_TXDR_REG:
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case STM32_I2S_RXDR_REG:
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case STM32_I2S_CGFR_REG:
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@@ -488,7 +492,7 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai,
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{
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struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
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int format = params_width(params);
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u32 cfgr, cfgr_mask, cfg1, cfg1_mask;
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u32 cfgr, cfgr_mask, cfg1;
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unsigned int fthlv;
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int ret;
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@@ -501,7 +505,7 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai,
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switch (format) {
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case 16:
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cfgr = I2S_CGFR_DATLEN_SET(I2S_I2SMOD_DATLEN_16);
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cfgr_mask = I2S_CGFR_DATLEN_MASK;
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cfgr_mask = I2S_CGFR_DATLEN_MASK | I2S_CGFR_CHLEN;
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break;
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case 32:
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cfgr = I2S_CGFR_DATLEN_SET(I2S_I2SMOD_DATLEN_32) |
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@@ -529,30 +533,32 @@ static int stm32_i2s_configure(struct snd_soc_dai *cpu_dai,
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if (ret < 0)
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return ret;
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cfg1 = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN;
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cfg1_mask = cfg1;
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fthlv = STM32_I2S_FIFO_SIZE * I2S_FIFO_TH_ONE_QUARTER / 4;
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cfg1 |= I2S_CFG1_FTHVL_SET(fthlv - 1);
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cfg1_mask |= I2S_CFG1_FTHVL_MASK;
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cfg1 = I2S_CFG1_FTHVL_SET(fthlv - 1);
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return regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,
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cfg1_mask, cfg1);
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I2S_CFG1_FTHVL_MASK, cfg1);
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}
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static int stm32_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&i2s->irq_lock, flags);
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i2s->substream = substream;
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spin_unlock_irqrestore(&i2s->irq_lock, flags);
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spin_lock(&i2s->lock_fd);
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i2s->refcount++;
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spin_unlock(&i2s->lock_fd);
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ret = clk_prepare_enable(i2s->i2sclk);
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if (ret < 0) {
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dev_err(cpu_dai->dev, "Failed to enable clock: %d\n", ret);
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return ret;
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}
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return regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG,
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I2S_IFCR_MASK, I2S_IFCR_MASK);
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return regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
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I2S_IFCR_MASK, I2S_IFCR_MASK);
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}
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static int stm32_i2s_hw_params(struct snd_pcm_substream *substream,
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@@ -589,6 +595,10 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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/* Enable i2s */
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dev_dbg(cpu_dai->dev, "start I2S\n");
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cfg1_mask = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN;
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regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,
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cfg1_mask, cfg1_mask);
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ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG,
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I2S_CR1_SPE, I2S_CR1_SPE);
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if (ret < 0) {
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@@ -596,28 +606,29 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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return ret;
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}
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ret = regmap_update_bits(i2s->regmap, STM32_I2S_CR1_REG,
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I2S_CR1_CSTART, I2S_CR1_CSTART);
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ret = regmap_write_bits(i2s->regmap, STM32_I2S_CR1_REG,
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I2S_CR1_CSTART, I2S_CR1_CSTART);
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if (ret < 0) {
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dev_err(cpu_dai->dev, "Error %d starting I2S\n", ret);
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return ret;
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}
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regmap_update_bits(i2s->regmap, STM32_I2S_IFCR_REG,
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I2S_IFCR_MASK, I2S_IFCR_MASK);
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regmap_write_bits(i2s->regmap, STM32_I2S_IFCR_REG,
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I2S_IFCR_MASK, I2S_IFCR_MASK);
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spin_lock(&i2s->lock_fd);
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i2s->refcount++;
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if (playback_flg) {
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ier = I2S_IER_UDRIE;
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} else {
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ier = I2S_IER_OVRIE;
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spin_lock(&i2s->lock_fd);
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if (i2s->refcount == 1)
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/* dummy write to trigger capture */
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if (STM32_I2S_IS_MASTER(i2s) && i2s->refcount == 1)
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/* dummy write to gate bus clocks */
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regmap_write(i2s->regmap,
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STM32_I2S_TXDR_REG, 0);
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spin_unlock(&i2s->lock_fd);
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}
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spin_unlock(&i2s->lock_fd);
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if (STM32_I2S_IS_SLAVE(i2s))
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ier |= I2S_IER_TIFREIE;
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@@ -642,7 +653,6 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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spin_unlock(&i2s->lock_fd);
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break;
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}
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spin_unlock(&i2s->lock_fd);
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dev_dbg(cpu_dai->dev, "stop I2S\n");
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@@ -650,8 +660,10 @@ static int stm32_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
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I2S_CR1_SPE, 0);
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if (ret < 0) {
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dev_err(cpu_dai->dev, "Error %d disabling I2S\n", ret);
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spin_unlock(&i2s->lock_fd);
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return ret;
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}
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spin_unlock(&i2s->lock_fd);
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cfg1_mask = I2S_CFG1_RXDMAEN | I2S_CFG1_TXDMAEN;
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regmap_update_bits(i2s->regmap, STM32_I2S_CFG1_REG,
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@@ -668,11 +680,16 @@ static void stm32_i2s_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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struct stm32_i2s_data *i2s = snd_soc_dai_get_drvdata(cpu_dai);
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i2s->substream = NULL;
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unsigned long flags;
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regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
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I2S_CGFR_MCKOE, (unsigned int)~I2S_CGFR_MCKOE);
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clk_disable_unprepare(i2s->i2sclk);
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spin_lock_irqsave(&i2s->irq_lock, flags);
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i2s->substream = NULL;
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spin_unlock_irqrestore(&i2s->irq_lock, flags);
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}
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static int stm32_i2s_dai_probe(struct snd_soc_dai *cpu_dai)
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@@ -703,6 +720,7 @@ static const struct regmap_config stm32_h7_i2s_regmap_conf = {
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.volatile_reg = stm32_i2s_volatile_reg,
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.writeable_reg = stm32_i2s_writeable_reg,
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.fast_io = true,
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.cache_type = REGCACHE_FLAT,
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};
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static const struct snd_soc_dai_ops stm32_i2s_pcm_dai_ops = {
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@@ -866,76 +884,68 @@ static int stm32_i2s_probe(struct platform_device *pdev)
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i2s->pdev = pdev;
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i2s->ms_flg = I2S_MS_NOT_SET;
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spin_lock_init(&i2s->lock_fd);
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spin_lock_init(&i2s->irq_lock);
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platform_set_drvdata(pdev, i2s);
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ret = stm32_i2s_dais_init(pdev, i2s);
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if (ret)
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return ret;
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i2s->regmap = devm_regmap_init_mmio(&pdev->dev, i2s->base,
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i2s->regmap_conf);
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i2s->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "pclk",
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i2s->base, i2s->regmap_conf);
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if (IS_ERR(i2s->regmap)) {
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dev_err(&pdev->dev, "regmap init failed\n");
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return PTR_ERR(i2s->regmap);
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}
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ret = clk_prepare_enable(i2s->pclk);
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if (ret) {
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dev_err(&pdev->dev, "Enable pclk failed: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(i2s->i2sclk);
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if (ret) {
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dev_err(&pdev->dev, "Enable i2sclk failed: %d\n", ret);
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goto err_pclk_disable;
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}
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ret = devm_snd_soc_register_component(&pdev->dev, &stm32_i2s_component,
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i2s->dai_drv, 1);
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if (ret)
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goto err_clocks_disable;
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return ret;
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ret = devm_snd_dmaengine_pcm_register(&pdev->dev,
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&stm32_i2s_pcm_config, 0);
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if (ret)
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goto err_clocks_disable;
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return ret;
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/* Set SPI/I2S in i2s mode */
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ret = regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
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I2S_CGFR_I2SMOD, I2S_CGFR_I2SMOD);
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if (ret)
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goto err_clocks_disable;
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return ret;
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err_clocks_disable:
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clk_disable_unprepare(i2s->i2sclk);
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err_pclk_disable:
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clk_disable_unprepare(i2s->pclk);
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return ret;
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return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG,
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I2S_CGFR_I2SMOD, I2S_CGFR_I2SMOD);
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}
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static int stm32_i2s_remove(struct platform_device *pdev)
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{
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struct stm32_i2s_data *i2s = platform_get_drvdata(pdev);
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MODULE_DEVICE_TABLE(of, stm32_i2s_ids);
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clk_disable_unprepare(i2s->i2sclk);
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clk_disable_unprepare(i2s->pclk);
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#ifdef CONFIG_PM_SLEEP
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static int stm32_i2s_suspend(struct device *dev)
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{
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struct stm32_i2s_data *i2s = dev_get_drvdata(dev);
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regcache_cache_only(i2s->regmap, true);
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regcache_mark_dirty(i2s->regmap);
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return 0;
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}
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MODULE_DEVICE_TABLE(of, stm32_i2s_ids);
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static int stm32_i2s_resume(struct device *dev)
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{
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struct stm32_i2s_data *i2s = dev_get_drvdata(dev);
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regcache_cache_only(i2s->regmap, false);
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return regcache_sync(i2s->regmap);
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}
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#endif /* CONFIG_PM_SLEEP */
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static const struct dev_pm_ops stm32_i2s_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(stm32_i2s_suspend, stm32_i2s_resume)
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};
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static struct platform_driver stm32_i2s_driver = {
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.driver = {
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.name = "st,stm32-i2s",
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.of_match_table = stm32_i2s_ids,
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.pm = &stm32_i2s_pm_ops,
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},
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.probe = stm32_i2s_probe,
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.remove = stm32_i2s_remove,
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};
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module_platform_driver(stm32_i2s_driver);
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|
@@ -112,16 +112,21 @@ static int stm32_sai_set_sync(struct stm32_sai_data *sai_client,
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if (!sai_provider) {
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dev_err(&sai_client->pdev->dev,
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"SAI sync provider data not found\n");
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return -EINVAL;
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ret = -EINVAL;
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goto out_put_dev;
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}
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/* Configure sync client */
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ret = stm32_sai_sync_conf_client(sai_client, synci);
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if (ret < 0)
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return ret;
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goto out_put_dev;
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/* Configure sync provider */
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return stm32_sai_sync_conf_provider(sai_provider, synco);
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ret = stm32_sai_sync_conf_provider(sai_provider, synco);
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out_put_dev:
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put_device(&pdev->dev);
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return ret;
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}
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static int stm32_sai_probe(struct platform_device *pdev)
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|
@@ -898,7 +898,7 @@ static int stm32_sai_configure_clock(struct snd_soc_dai *cpu_dai,
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struct snd_pcm_hw_params *params)
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{
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struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai);
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int cr1, mask, div = 0;
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int div = 0;
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int sai_clk_rate, mclk_ratio, den;
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unsigned int rate = params_rate(params);
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@@ -943,10 +943,8 @@ static int stm32_sai_configure_clock(struct snd_soc_dai *cpu_dai,
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} else {
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if (sai->mclk_rate) {
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mclk_ratio = sai->mclk_rate / rate;
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if (mclk_ratio == 512) {
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mask = SAI_XCR1_OSR;
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cr1 = SAI_XCR1_OSR;
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} else if (mclk_ratio != 256) {
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if ((mclk_ratio != 512) &&
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(mclk_ratio != 256)) {
|
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dev_err(cpu_dai->dev,
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"Wrong mclk ratio %d\n",
|
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mclk_ratio);
|
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|
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