MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@@ -49,12 +49,12 @@
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#include <asm/netlogic/xlp-hal/sys.h>
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#include <asm/netlogic/xlp-hal/cpucontrol.h>
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#define CP0_EBASE $15
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#define CP0_EBASE $15
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#define SYS_CPU_COHERENT_BASE(node) CKSEG1ADDR(XLP_DEFAULT_IO_BASE) + \
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XLP_IO_SYS_OFFSET(node) + XLP_IO_PCI_HDRSZ + \
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SYS_CPU_NONCOHERENT_MODE * 4
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#define XLP_AX_WORKAROUND /* enable Ax silicon workarounds */
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#define XLP_AX_WORKAROUND /* enable Ax silicon workarounds */
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/* Enable XLP features and workarounds in the LSU */
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.macro xlp_config_lsu
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@@ -85,7 +85,7 @@
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li t0, LSU_DEBUG_DATA0
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li t1, LSU_DEBUG_ADDR
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li t2, 0 /* index */
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li t3, 0x1000 /* loop count */
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li t3, 0x1000 /* loop count */
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1:
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sll v0, t2, 5
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mtcr zero, t0
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@@ -134,7 +134,7 @@ FEXPORT(nlm_reset_entry)
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and k1, k0, k1
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beqz k1, 1f /* go to real reset entry */
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nop
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li k1, CKSEG1ADDR(RESET_DATA_PHYS) /* NMI */
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li k1, CKSEG1ADDR(RESET_DATA_PHYS) /* NMI */
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ld k0, BOOT_NMI_HANDLER(k1)
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jr k0
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nop
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@@ -235,7 +235,7 @@ EXPORT(nlm_reset_entry_end)
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FEXPORT(xlp_boot_core0_siblings) /* "Master" cpu starts from here */
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xlp_config_lsu
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dmtc0 sp, $4, 2 /* SP saved in UserLocal */
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dmtc0 sp, $4, 2 /* SP saved in UserLocal */
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SAVE_ALL
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sync
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/* find the location to which nlm_boot_siblings was relocated */
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@@ -301,13 +301,13 @@ NESTED(nlm_rmiboot_preboot, 16, sp)
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*/
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li t0, 0x400
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mfcr t1, t0
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li t2, 6 /* XLR thread mode mask */
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li t2, 6 /* XLR thread mode mask */
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nor t3, t2, zero
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and t2, t1, t2 /* t2 - current thread mode */
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li v0, CKSEG1ADDR(RESET_DATA_PHYS)
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lw v1, BOOT_THREAD_MODE(v0) /* v1 - new thread mode */
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sll v1, 1
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beq v1, t2, 1f /* same as request value */
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beq v1, t2, 1f /* same as request value */
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nop /* nothing to do */
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and t2, t1, t3 /* mask out old thread mode */
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