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MIPS: Whitespace cleanup.

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Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
2013-01-22 12:59:30 +01:00
parent 405ab01c70
commit 7034228792
764 changed files with 11535 additions and 11535 deletions
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30
arch/mips/include/asm/pci/bridge.h
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@@ -85,7 +85,7 @@ typedef volatile struct bridge_s {
#define b_wid_llp b_widget.w_llp_cfg
#define b_wid_tflush b_widget.w_tflush
/* bridge-specific widget configuration 0x000058-0x00007F */
/* bridge-specific widget configuration 0x000058-0x00007F */
bridgereg_t _pad_000058;
bridgereg_t b_wid_aux_err; /* 0x00005C */
bridgereg_t _pad_000060;
@@ -167,8 +167,8 @@ typedef volatile struct bridge_s {
bridgereg_t __pad; /* 0x0002{80,,,88} */
bridgereg_t reg; /* 0x0002{84,,,8C} */
} b_rrb_map[2]; /* 0x000280 */
#define b_even_resp b_rrb_map[0].reg /* 0x000284 */
#define b_odd_resp b_rrb_map[1].reg /* 0x00028C */
#define b_even_resp b_rrb_map[0].reg /* 0x000284 */
#define b_odd_resp b_rrb_map[1].reg /* 0x00028C */
bridgereg_t _pad_000290;
bridgereg_t b_resp_status; /* 0x000294 */
@@ -233,7 +233,7 @@ typedef volatile struct bridge_s {
u8 _pad_030007[0x04fff8]; /* 0x030008-0x07FFFF */
/* External Address Translation Entry RAM 0x080000-0x0FFFFF */
bridge_ate_t b_ext_ate_ram[0x10000];
bridge_ate_t b_ext_ate_ram[0x10000];
/* Reserved 0x100000-0x1FFFFF */
char _pad_100000[0x200000-0x100000];
@@ -400,7 +400,7 @@ typedef struct bridge_err_cmdword_s {
#define BRIDGE_REV_A 0x1
#define BRIDGE_REV_B 0x2
#define BRIDGE_REV_C 0x3
#define BRIDGE_REV_D 0x4
#define BRIDGE_REV_D 0x4
/* Bridge widget status register bits definition */
@@ -691,21 +691,21 @@ typedef struct bridge_err_cmdword_s {
#define BRIDGE_CREDIT 3
/* RRB assignment register */
#define BRIDGE_RRB_EN 0x8 /* after shifting down */
#define BRIDGE_RRB_DEV 0x7 /* after shifting down */
#define BRIDGE_RRB_VDEV 0x4 /* after shifting down */
#define BRIDGE_RRB_PDEV 0x3 /* after shifting down */
#define BRIDGE_RRB_EN 0x8 /* after shifting down */
#define BRIDGE_RRB_DEV 0x7 /* after shifting down */
#define BRIDGE_RRB_VDEV 0x4 /* after shifting down */
#define BRIDGE_RRB_PDEV 0x3 /* after shifting down */
/* RRB status register */
#define BRIDGE_RRB_VALID(r) (0x00010000<<(r))
#define BRIDGE_RRB_INUSE(r) (0x00000001<<(r))
#define BRIDGE_RRB_VALID(r) (0x00010000<<(r))
#define BRIDGE_RRB_INUSE(r) (0x00000001<<(r))
/* RRB clear register */
#define BRIDGE_RRB_CLEAR(r) (0x00000001<<(r))
#define BRIDGE_RRB_CLEAR(r) (0x00000001<<(r))
/* xbox system controller declarations */
#define XBOX_BRIDGE_WID 8
#define FLASH_PROM1_BASE 0xE00000 /* To read the xbox sysctlr status */
#define XBOX_BRIDGE_WID 8
#define FLASH_PROM1_BASE 0xE00000 /* To read the xbox sysctlr status */
#define XBOX_RPS_EXISTS 1 << 6 /* RPS bit in status register */
#define XBOX_RPS_FAIL 1 << 4 /* RPS status bit in register */
@@ -838,7 +838,7 @@ struct bridge_controller {
bridge_t *base;
nasid_t nasid;
unsigned int widget_id;
unsigned int irq_cpu;
unsigned int irq_cpu;
u64 baddr;
unsigned int pci_int[8];
};