MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@@ -34,7 +34,7 @@
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#define GT_MULTI_OFS 0x120
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/* CPU Address Decode. */
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/* CPU Address Decode. */
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#define GT_SCS10LD_OFS 0x008
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#define GT_SCS10HD_OFS 0x010
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#define GT_SCS32LD_OFS 0x018
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@@ -106,12 +106,12 @@
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#define GT_ADERR_OFS 0x470
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/* SDRAM Configuration. */
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/* SDRAM Configuration. */
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#define GT_SDRAM_CFG_OFS 0x448
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#define GT_SDRAM_OPMODE_OFS 0x474
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#define GT_SDRAM_BM_OFS 0x478
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#define GT_SDRAM_ADDRDECODE_OFS 0x47c
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#define GT_SDRAM_ADDRDECODE_OFS 0x47c
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/* SDRAM Parameters. */
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#define GT_SDRAM_B0_OFS 0x44c
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@@ -126,14 +126,14 @@
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#define GT_DEV_B3_OFS 0x468
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#define GT_DEV_BOOT_OFS 0x46c
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/* ECC. */
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/* ECC. */
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#define GT_ECC_ERRDATALO 0x480 /* GT-64120A only */
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#define GT_ECC_ERRDATAHI 0x484 /* GT-64120A only */
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#define GT_ECC_MEM 0x488 /* GT-64120A only */
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#define GT_ECC_CALC 0x48c /* GT-64120A only */
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#define GT_ECC_ERRADDR 0x490 /* GT-64120A only */
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/* DMA Record. */
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/* DMA Record. */
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#define GT_DMA0_CNT_OFS 0x800
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#define GT_DMA1_CNT_OFS 0x804
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#define GT_DMA2_CNT_OFS 0x808
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@@ -156,13 +156,13 @@
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#define GT_DMA2_CUR_OFS 0x878
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#define GT_DMA3_CUR_OFS 0x87c
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/* DMA Channel Control. */
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/* DMA Channel Control. */
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#define GT_DMA0_CTRL_OFS 0x840
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#define GT_DMA1_CTRL_OFS 0x844
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#define GT_DMA2_CTRL_OFS 0x848
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#define GT_DMA3_CTRL_OFS 0x84c
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/* DMA Arbiter. */
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/* DMA Arbiter. */
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#define GT_DMA_ARB_OFS 0x860
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/* Timer/Counter. */
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@@ -220,7 +220,7 @@
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#define GT_PCI0_CFGADDR_OFS 0xcf8
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#define GT_PCI0_CFGDATA_OFS 0xcfc
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/* Interrupts. */
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/* Interrupts. */
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#define GT_INTRCAUSE_OFS 0xc18
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#define GT_INTRMASK_OFS 0xc1c
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@@ -547,15 +547,15 @@
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#define GT_DEF_BASE 0x14000000UL
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#define GT_MAX_BANKSIZE (256 * 1024 * 1024) /* Max 256MB bank */
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#define GT_LATTIM_MIN 6 /* Minimum lat */
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#define GT_LATTIM_MIN 6 /* Minimum lat */
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/*
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* The gt64120_dep.h file must define the following macros
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*
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* GT_READ(ofs, data_pointer)
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* GT_WRITE(ofs, data) - read/write GT64120 registers in 32bit
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* GT_WRITE(ofs, data) - read/write GT64120 registers in 32bit
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*
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* TIMER - gt64120 timer irq, temporary solution until
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* TIMER - gt64120 timer irq, temporary solution until
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* full gt64120 cascade interrupt support is in place
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*/
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