amd-xgbe: Adjust register settings to improve performance
Add support to change some general performance settings and to provide some performance settings based on the device that is probed. This includes: - Setting the maximum read/write outstanding request limit - Reducing the AXI interface burst length size - Selectively setting the Tx and Rx descriptor pre-fetch threshold - Selectively setting additional cache coherency controls Tested and verified on all versions of the hardware. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
7e1e6b86a5
commit
6f595959c0
@@ -327,8 +327,9 @@ static int xgbe_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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/* Set the DMA coherency values */
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pdata->coherent = 1;
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pdata->arcr = XGBE_DMA_OS_ARCR;
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pdata->awcr = XGBE_DMA_OS_AWCR;
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pdata->arcr = XGBE_DMA_PCI_ARCR;
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pdata->awcr = XGBE_DMA_PCI_AWCR;
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pdata->awarcr = XGBE_DMA_PCI_AWARCR;
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/* Set the maximum channels and queues */
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reg = XP_IOREAD(pdata, XP_PROP_1);
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@@ -447,6 +448,8 @@ static const struct xgbe_version_data xgbe_v2a = {
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.ecc_support = 1,
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.i2c_support = 1,
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.irq_reissue_support = 1,
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.tx_desc_prefetch = 5,
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.rx_desc_prefetch = 5,
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};
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static const struct xgbe_version_data xgbe_v2b = {
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@@ -459,6 +462,8 @@ static const struct xgbe_version_data xgbe_v2b = {
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.ecc_support = 1,
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.i2c_support = 1,
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.irq_reissue_support = 1,
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.tx_desc_prefetch = 5,
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.rx_desc_prefetch = 5,
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};
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static const struct pci_device_id xgbe_pci_table[] = {
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