ath5k: Update gain_F calibration code and add documentation
* Update and cleanup rf gain optimization code * Add comments and refferences to docs and use sane function names * Use only step index on ath5k_gain, no need to have a pointer to the current step since we can determine te step from it's index, this also allows us to put all other structs on rfgain.h and cleanup ath5k.h a little * No need for ah_rfgain variable, we use ah_gain.g_state for everything * Tested on RF2112B chip but gain_F calibration is not yet done (we will finish this on the next patch where we'll rewrite rf-buffer handling) * Use initial rf gain settings for 2316 and 2317 SoCs introduced on a previous patch It seems big but it's mostly cleanup, very few functional changes have been made on phy.c Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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John W. Linville

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33a31826b4
commit
6f3b414aca
@@ -649,49 +649,21 @@ struct ath5k_beacon_state {
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enum ath5k_rfgain {
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AR5K_RFGAIN_INACTIVE = 0,
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AR5K_RFGAIN_ACTIVE,
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AR5K_RFGAIN_READ_REQUESTED,
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AR5K_RFGAIN_NEED_CHANGE,
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};
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#define AR5K_GAIN_CRN_FIX_BITS_5111 4
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#define AR5K_GAIN_CRN_FIX_BITS_5112 7
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#define AR5K_GAIN_CRN_MAX_FIX_BITS AR5K_GAIN_CRN_FIX_BITS_5112
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#define AR5K_GAIN_DYN_ADJUST_HI_MARGIN 15
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#define AR5K_GAIN_DYN_ADJUST_LO_MARGIN 20
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#define AR5K_GAIN_CCK_PROBE_CORR 5
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#define AR5K_GAIN_CCK_OFDM_GAIN_DELTA 15
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#define AR5K_GAIN_STEP_COUNT 10
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#define AR5K_GAIN_PARAM_TX_CLIP 0
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#define AR5K_GAIN_PARAM_PD_90 1
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#define AR5K_GAIN_PARAM_PD_84 2
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#define AR5K_GAIN_PARAM_GAIN_SEL 3
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#define AR5K_GAIN_PARAM_MIX_ORN 0
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#define AR5K_GAIN_PARAM_PD_138 1
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#define AR5K_GAIN_PARAM_PD_137 2
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#define AR5K_GAIN_PARAM_PD_136 3
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#define AR5K_GAIN_PARAM_PD_132 4
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#define AR5K_GAIN_PARAM_PD_131 5
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#define AR5K_GAIN_PARAM_PD_130 6
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#define AR5K_GAIN_CHECK_ADJUST(_g) \
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((_g)->g_current <= (_g)->g_low || (_g)->g_current >= (_g)->g_high)
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struct ath5k_gain_opt_step {
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s16 gos_param[AR5K_GAIN_CRN_MAX_FIX_BITS];
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s32 gos_gain;
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};
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struct ath5k_gain {
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u32 g_step_idx;
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u32 g_current;
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u32 g_target;
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u32 g_low;
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u32 g_high;
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u32 g_f_corr;
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u32 g_active;
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const struct ath5k_gain_opt_step *g_step;
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u8 g_step_idx;
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u8 g_current;
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u8 g_target;
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u8 g_low;
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u8 g_high;
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u8 g_f_corr;
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u8 g_state;
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};
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/********************\
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COMMON DEFINITIONS
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\********************/
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@@ -1053,7 +1025,6 @@ struct ath5k_hw {
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bool ah_running;
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bool ah_single_chip;
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bool ah_combined_mic;
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enum ath5k_rfgain ah_rf_gain;
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u32 ah_mac_srev;
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u16 ah_mac_version;
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@@ -1262,9 +1233,9 @@ extern int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_cha
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/* Initialize RF */
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extern int ath5k_hw_rfregs(struct ath5k_hw *ah, struct ieee80211_channel *channel, unsigned int mode);
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extern int ath5k_hw_rfgain(struct ath5k_hw *ah, unsigned int freq);
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extern enum ath5k_rfgain ath5k_hw_get_rf_gain(struct ath5k_hw *ah);
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extern int ath5k_hw_set_rfgain_opt(struct ath5k_hw *ah);
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extern int ath5k_hw_rfgain_init(struct ath5k_hw *ah, unsigned int freq);
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extern enum ath5k_rfgain ath5k_hw_gainf_calibrate(struct ath5k_hw *ah);
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extern int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah);
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/* PHY/RF channel functions */
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extern bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags);
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extern int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel);
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