drm/radeon/kms: add pageflip ioctl support (v3)
This adds support for dri2 pageflipping.
v2: precision updates from Mario Kleiner.
v3: Multihead fixes from Mario Kleiner; missing crtc offset
add note about update pending bit on pre-avivo chips
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alex Deucher
committed by
Dave Airlie
Dave Airlie
parent
f5a8020903
commit
6f34be50bd
@@ -183,12 +183,273 @@ static void radeon_crtc_destroy(struct drm_crtc *crtc)
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kfree(radeon_crtc);
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}
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/*
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* Handle unpin events outside the interrupt handler proper.
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*/
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static void radeon_unpin_work_func(struct work_struct *__work)
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{
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struct radeon_unpin_work *work =
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container_of(__work, struct radeon_unpin_work, work);
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int r;
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/* unpin of the old buffer */
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r = radeon_bo_reserve(work->old_rbo, false);
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if (likely(r == 0)) {
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r = radeon_bo_unpin(work->old_rbo);
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if (unlikely(r != 0)) {
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DRM_ERROR("failed to unpin buffer after flip\n");
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}
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radeon_bo_unreserve(work->old_rbo);
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} else
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DRM_ERROR("failed to reserve buffer after flip\n");
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kfree(work);
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}
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void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id)
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{
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struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
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struct radeon_unpin_work *work;
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struct drm_pending_vblank_event *e;
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struct timeval now;
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unsigned long flags;
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u32 update_pending;
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int vpos, hpos;
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spin_lock_irqsave(&rdev->ddev->event_lock, flags);
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work = radeon_crtc->unpin_work;
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if (work == NULL ||
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!radeon_fence_signaled(work->fence)) {
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spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
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return;
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}
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/* New pageflip, or just completion of a previous one? */
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if (!radeon_crtc->deferred_flip_completion) {
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/* do the flip (mmio) */
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update_pending = radeon_page_flip(rdev, crtc_id, work->new_crtc_base);
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} else {
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/* This is just a completion of a flip queued in crtc
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* at last invocation. Make sure we go directly to
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* completion routine.
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*/
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update_pending = 0;
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radeon_crtc->deferred_flip_completion = 0;
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}
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/* Has the pageflip already completed in crtc, or is it certain
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* to complete in this vblank?
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*/
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if (update_pending &&
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(DRM_SCANOUTPOS_VALID & radeon_get_crtc_scanoutpos(rdev->ddev, crtc_id,
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&vpos, &hpos)) &&
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(vpos >=0) &&
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(vpos < (99 * rdev->mode_info.crtcs[crtc_id]->base.hwmode.crtc_vdisplay)/100)) {
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/* crtc didn't flip in this target vblank interval,
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* but flip is pending in crtc. It will complete it
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* in next vblank interval, so complete the flip at
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* next vblank irq.
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*/
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radeon_crtc->deferred_flip_completion = 1;
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spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
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return;
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}
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/* Pageflip (will be) certainly completed in this vblank. Clean up. */
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radeon_crtc->unpin_work = NULL;
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/* wakeup userspace */
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if (work->event) {
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e = work->event;
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do_gettimeofday(&now);
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e->event.sequence = drm_vblank_count(rdev->ddev, radeon_crtc->crtc_id);
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e->event.tv_sec = now.tv_sec;
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e->event.tv_usec = now.tv_usec;
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list_add_tail(&e->base.link, &e->base.file_priv->event_list);
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wake_up_interruptible(&e->base.file_priv->event_wait);
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}
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spin_unlock_irqrestore(&rdev->ddev->event_lock, flags);
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drm_vblank_put(rdev->ddev, radeon_crtc->crtc_id);
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radeon_fence_unref(&work->fence);
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radeon_post_page_flip(work->rdev, work->crtc_id);
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schedule_work(&work->work);
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}
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static int radeon_crtc_page_flip(struct drm_crtc *crtc,
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struct drm_framebuffer *fb,
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struct drm_pending_vblank_event *event)
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{
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struct drm_device *dev = crtc->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct radeon_framebuffer *old_radeon_fb;
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struct radeon_framebuffer *new_radeon_fb;
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struct drm_gem_object *obj;
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struct radeon_bo *rbo;
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struct radeon_fence *fence;
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struct radeon_unpin_work *work;
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unsigned long flags;
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u32 tiling_flags, pitch_pixels;
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u64 base;
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int r;
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work = kzalloc(sizeof *work, GFP_KERNEL);
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if (work == NULL)
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return -ENOMEM;
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r = radeon_fence_create(rdev, &fence);
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if (unlikely(r != 0)) {
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kfree(work);
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DRM_ERROR("flip queue: failed to create fence.\n");
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return -ENOMEM;
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}
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work->event = event;
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work->rdev = rdev;
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work->crtc_id = radeon_crtc->crtc_id;
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work->fence = radeon_fence_ref(fence);
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old_radeon_fb = to_radeon_framebuffer(crtc->fb);
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new_radeon_fb = to_radeon_framebuffer(fb);
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/* schedule unpin of the old buffer */
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obj = old_radeon_fb->obj;
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rbo = obj->driver_private;
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work->old_rbo = rbo;
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INIT_WORK(&work->work, radeon_unpin_work_func);
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/* We borrow the event spin lock for protecting unpin_work */
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spin_lock_irqsave(&dev->event_lock, flags);
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if (radeon_crtc->unpin_work) {
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spin_unlock_irqrestore(&dev->event_lock, flags);
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kfree(work);
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radeon_fence_unref(&fence);
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DRM_DEBUG_DRIVER("flip queue: crtc already busy\n");
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return -EBUSY;
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}
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radeon_crtc->unpin_work = work;
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radeon_crtc->deferred_flip_completion = 0;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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/* pin the new buffer */
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obj = new_radeon_fb->obj;
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rbo = obj->driver_private;
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DRM_DEBUG_DRIVER("flip-ioctl() cur_fbo = %p, cur_bbo = %p\n",
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work->old_rbo, rbo);
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r = radeon_bo_reserve(rbo, false);
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if (unlikely(r != 0)) {
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DRM_ERROR("failed to reserve new rbo buffer before flip\n");
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goto pflip_cleanup;
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}
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r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &base);
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if (unlikely(r != 0)) {
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radeon_bo_unreserve(rbo);
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r = -EINVAL;
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DRM_ERROR("failed to pin new rbo buffer before flip\n");
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goto pflip_cleanup;
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}
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radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
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radeon_bo_unreserve(rbo);
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if (!ASIC_IS_AVIVO(rdev)) {
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/* crtc offset is from display base addr not FB location */
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base -= radeon_crtc->legacy_display_base_addr;
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pitch_pixels = fb->pitch / (fb->bits_per_pixel / 8);
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if (tiling_flags & RADEON_TILING_MACRO) {
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if (ASIC_IS_R300(rdev)) {
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base &= ~0x7ff;
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} else {
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int byteshift = fb->bits_per_pixel >> 4;
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int tile_addr = (((crtc->y >> 3) * pitch_pixels + crtc->x) >> (8 - byteshift)) << 11;
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base += tile_addr + ((crtc->x << byteshift) % 256) + ((crtc->y % 8) << 8);
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}
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} else {
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int offset = crtc->y * pitch_pixels + crtc->x;
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switch (fb->bits_per_pixel) {
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case 8:
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default:
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offset *= 1;
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break;
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case 15:
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case 16:
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offset *= 2;
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break;
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case 24:
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offset *= 3;
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break;
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case 32:
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offset *= 4;
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break;
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}
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base += offset;
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}
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base &= ~7;
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}
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spin_lock_irqsave(&dev->event_lock, flags);
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work->new_crtc_base = base;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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/* update crtc fb */
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crtc->fb = fb;
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r = drm_vblank_get(dev, radeon_crtc->crtc_id);
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if (r) {
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DRM_ERROR("failed to get vblank before flip\n");
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goto pflip_cleanup1;
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}
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/* 32 ought to cover us */
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r = radeon_ring_lock(rdev, 32);
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if (r) {
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DRM_ERROR("failed to lock the ring before flip\n");
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goto pflip_cleanup2;
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}
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/* emit the fence */
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radeon_fence_emit(rdev, fence);
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/* set the proper interrupt */
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radeon_pre_page_flip(rdev, radeon_crtc->crtc_id);
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/* fire the ring */
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radeon_ring_unlock_commit(rdev);
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return 0;
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pflip_cleanup2:
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drm_vblank_put(dev, radeon_crtc->crtc_id);
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pflip_cleanup1:
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r = radeon_bo_reserve(rbo, false);
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if (unlikely(r != 0)) {
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DRM_ERROR("failed to reserve new rbo in error path\n");
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goto pflip_cleanup;
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}
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r = radeon_bo_unpin(rbo);
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if (unlikely(r != 0)) {
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radeon_bo_unreserve(rbo);
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r = -EINVAL;
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DRM_ERROR("failed to unpin new rbo in error path\n");
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goto pflip_cleanup;
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}
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radeon_bo_unreserve(rbo);
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pflip_cleanup:
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spin_lock_irqsave(&dev->event_lock, flags);
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radeon_crtc->unpin_work = NULL;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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radeon_fence_unref(&fence);
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kfree(work);
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return r;
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}
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static const struct drm_crtc_funcs radeon_crtc_funcs = {
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.cursor_set = radeon_crtc_cursor_set,
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.cursor_move = radeon_crtc_cursor_move,
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.gamma_set = radeon_crtc_gamma_set,
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.set_config = drm_crtc_helper_set_config,
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.destroy = radeon_crtc_destroy,
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.page_flip = radeon_crtc_page_flip,
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};
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static void radeon_crtc_init(struct drm_device *dev, int index)
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