wcn36xx: Correct DXE chip version differentiation
The CCU block in WCNSS is configured for appropriate routing of interrupts from the DXE to the application cpu, this is not dependant on the iris version (wcn3660 vs wcn3680), but rather if the SoC has a riva or pronto built in. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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Kalle Valo

parent
05ddce497c
commit
6f10b4e1e6
@@ -702,12 +702,13 @@ int wcn36xx_dxe_init(struct wcn36xx *wcn)
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reg_data = WCN36XX_DXE_REG_RESET;
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wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data);
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/* Setting interrupt path */
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reg_data = WCN36XX_DXE_CCU_INT;
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if (wcn->chip_version == WCN36XX_CHIP_3680)
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wcn36xx_ccu_write_register(wcn, WCN36XX_DXE_REG_CCU_INT_3680, reg_data);
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/* Select channels for rx avail and xfer done interrupts... */
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reg_data = (WCN36XX_DXE_INT_CH3_MASK | WCN36XX_DXE_INT_CH1_MASK) << 16 |
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WCN36XX_DXE_INT_CH0_MASK | WCN36XX_DXE_INT_CH4_MASK;
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if (wcn->is_pronto)
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wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_PRONTO, reg_data);
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else
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wcn36xx_ccu_write_register(wcn, WCN36XX_DXE_REG_CCU_INT_3660, reg_data);
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wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_RIVA, reg_data);
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/***************************************/
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/* Init descriptors for TX LOW channel */
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