ARM: imx5: add step clock, used when reprogramming PLL1

This is the bypass clock used to feed the ARM partition
while we reprogram PLL1 to another rate.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
This commit is contained in:
Lucas Stach
2014-09-26 15:41:00 +02:00
committed by Shawn Guo
parent 8f0b287e0d
commit 6f0628aa9f
2 changed files with 11 additions and 2 deletions

View File

@@ -198,6 +198,8 @@
#define IMX5_CLK_OCRAM 186
#define IMX5_CLK_SAHARA_IPG_GATE 187
#define IMX5_CLK_SATA_REF 188
#define IMX5_CLK_END 189
#define IMX5_CLK_STEP_SEL 189
#define IMX5_CLK_CPU_PODF_SEL 190
#define IMX5_CLK_END 191
#endif /* __DT_BINDINGS_CLOCK_IMX5_H */