xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

bcm63xx_enet: add support for Broadcom BCM63xx integrated gigabit switch

Browse Source 
Newer Broadcom BCM63xx SoCs: 6328, 6362 and 6368 have an integrated switch
which needs to be driven slightly differently from the traditional
external switches. This patch introduces changes in arch/mips/bcm63xx in order
to:

- register a bcm63xx_enetsw driver instead of bcm63xx_enet driver
- update DMA channels configuration & state RAM base addresses
- add a new platform data configuration knob to define the number of
  ports per switch/device and force link on some ports
- define the required switch registers

On the driver side, the following changes are required:

- the switch ports need to be polled to ensure the link is up and
  running and RX/TX can properly work
- basic switch configuration needs to be performed for the switch to
  forward packets to the CPU
- update the MIB counters since the integrated

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Maxime Bizon
2013-06-04 22:53:35 +01:00
committed by David S. Miller
parent 0ae99b5fed
commit 6f00a02296
7 changed files with 1177 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files

28
arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
View File

@@ -39,7 +39,35 @@ struct bcm63xx_enet_platform_data {
int phy_id, int reg, int val));
};
/*
* on board ethernet switch platform data
*/
#define ENETSW_MAX_PORT 8
#define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
#define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
#define ENETSW_RGMII_PORT0 4
struct bcm63xx_enetsw_port {
int used;
int phy_id;
int bypass_link;
int force_speed;
int force_duplex_full;
const char *name;
};
struct bcm63xx_enetsw_platform_data {
char mac_addr[ETH_ALEN];
int num_ports;
struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
};
int __init bcm63xx_enet_register(int unit,
const struct bcm63xx_enet_platform_data *pd);
int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
#endif /* ! BCM63XX_DEV_ENET_H_ */

50
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
View File

@@ -830,10 +830,60 @@
* _REG relative to RSET_ENETSW
*************************************************************************/
/* Port traffic control */
#define ENETSW_PTCTRL_REG(x) (0x0 + (x))
#define ENETSW_PTCTRL_RXDIS_MASK (1 << 0)
#define ENETSW_PTCTRL_TXDIS_MASK (1 << 1)
/* Switch mode register */
#define ENETSW_SWMODE_REG (0xb)
#define ENETSW_SWMODE_FWD_EN_MASK (1 << 1)
/* IMP override Register */
#define ENETSW_IMPOV_REG (0xe)
#define ENETSW_IMPOV_FORCE_MASK (1 << 7)
#define ENETSW_IMPOV_TXFLOW_MASK (1 << 5)
#define ENETSW_IMPOV_RXFLOW_MASK (1 << 4)
#define ENETSW_IMPOV_1000_MASK (1 << 3)
#define ENETSW_IMPOV_100_MASK (1 << 2)
#define ENETSW_IMPOV_FDX_MASK (1 << 1)
#define ENETSW_IMPOV_LINKUP_MASK (1 << 0)
/* Port override Register */
#define ENETSW_PORTOV_REG(x) (0x58 + (x))
#define ENETSW_PORTOV_ENABLE_MASK (1 << 6)
#define ENETSW_PORTOV_TXFLOW_MASK (1 << 5)
#define ENETSW_PORTOV_RXFLOW_MASK (1 << 4)
#define ENETSW_PORTOV_1000_MASK (1 << 3)
#define ENETSW_PORTOV_100_MASK (1 << 2)
#define ENETSW_PORTOV_FDX_MASK (1 << 1)
#define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
/* MDIO control register */
#define ENETSW_MDIOC_REG (0xb0)
#define ENETSW_MDIOC_EXT_MASK (1 << 16)
#define ENETSW_MDIOC_REG_SHIFT 20
#define ENETSW_MDIOC_PHYID_SHIFT 25
#define ENETSW_MDIOC_RD_MASK (1 << 30)
#define ENETSW_MDIOC_WR_MASK (1 << 31)
/* MDIO data register */
#define ENETSW_MDIOD_REG (0xb4)
/* Global Management Configuration Register */
#define ENETSW_GMCR_REG (0x200)
#define ENETSW_GMCR_RST_MIB_MASK (1 << 0)
/* MIB register */
#define ENETSW_MIB_REG(x) (0x2800 + (x) * 4)
#define ENETSW_MIB_REG_COUNT 47
/* Jumbo control register port mask register */
#define ENETSW_JMBCTL_PORT_REG (0x4004)
/* Jumbo control mib good frame register */
#define ENETSW_JMBCTL_MAXSIZE_REG (0x4008)
/*************************************************************************
* _REG relative to RSET_OHCI_PRIV

2
arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
View File

@@ -24,6 +24,7 @@ struct board_info {
/* enabled feature/device */
unsigned int has_enet0:1;
unsigned int has_enet1:1;
unsigned int has_enetsw:1;
unsigned int has_pci:1;
unsigned int has_pccard:1;
unsigned int has_ohci0:1;
@@ -36,6 +37,7 @@ struct board_info {
/* ethernet config */
struct bcm63xx_enet_platform_data enet0;
struct bcm63xx_enet_platform_data enet1;
struct bcm63xx_enetsw_platform_data enetsw;
/* USB config */
struct bcm63xx_usbd_platform_data usbd;