ath9k_hw: Fix low throughput issue with AR93xx

TX underruns were noticed when RTS/CTS preceded aggregates.
This issue was noticed in ar93xx family of chipsets only.
The workaround involves padding the RTS or CTS length up
to the min packet length of 256 bytes required by the
hardware by adding delimiters to the fist descriptor of
the aggregate.

Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
这个提交包含在:
Senthil Balasubramanian
2010-11-10 05:03:16 -08:00
提交者 John W. Linville
父节点 39ec2997c3
当前提交 6ee63f55c7
修改 4 个文件,包含 33 行新增2 行删除

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@@ -803,6 +803,9 @@ struct ath_hw {
* this register when in sleep states.
*/
u32 WARegVal;
/* Enterprise mode cap */
u32 ent_mode;
};
static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah)