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soc/tegra: fuse: Add RAM code reader helper

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Needed for the EMC and MC drivers to know what timings from the DT to
use.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Mikko Perttunen
2015-03-12 15:47:55 +01:00
committed by Thierry Reding
parent 405990c7e8
commit 6ea2609ab3
2 changed files with 22 additions and 0 deletions
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21
drivers/soc/tegra/fuse/tegra-apbmisc.c
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@@ -28,8 +28,15 @@
#define APBMISC_SIZE 0x64 #define APBMISC_SIZE 0x64
#define FUSE_SKU_INFO 0x10 #define FUSE_SKU_INFO 0x10
#define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4
#define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG \
(0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
#define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT \
(0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
static void __iomem *apbmisc_base; static void __iomem *apbmisc_base;
static void __iomem *strapping_base; static void __iomem *strapping_base;
static bool long_ram_code;
u32 tegra_read_chipid(void) u32 tegra_read_chipid(void)
{ {
@@ -54,6 +61,18 @@ u32 tegra_read_straps(void)
return 0; return 0;
} }
u32 tegra_read_ram_code(void)
{
u32 straps = tegra_read_straps();
if (long_ram_code)
straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG;
else
straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT;
return straps >> PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT;
}
static const struct of_device_id apbmisc_match[] __initconst = { static const struct of_device_id apbmisc_match[] __initconst = {
{ .compatible = "nvidia,tegra20-apbmisc", }, { .compatible = "nvidia,tegra20-apbmisc", },
{}, {},
@@ -112,4 +131,6 @@ void __init tegra_init_apbmisc(void)
strapping_base = of_iomap(np, 1); strapping_base = of_iomap(np, 1);
if (!strapping_base) if (!strapping_base)
pr_err("ioremap tegra strapping_base failed\n"); pr_err("ioremap tegra strapping_base failed\n");
long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code");
} }

1
include/soc/tegra/fuse.h
View File

@@ -56,6 +56,7 @@ struct tegra_sku_info {
}; };
u32 tegra_read_straps(void); u32 tegra_read_straps(void);
u32 tegra_read_ram_code(void);
u32 tegra_read_chipid(void); u32 tegra_read_chipid(void);
int tegra_fuse_readl(unsigned long offset, u32 *value); int tegra_fuse_readl(unsigned long offset, u32 *value);