xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

MIPS: ath79: remove unused ar7{1x,24}x_pcibios_init functions

Browse Source 
The functions are unused now, so remove them.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4909/
Signed-off-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Gabor Juhos
2013-02-04 11:58:49 +01:00
committed by John Crispin
parent 9fc1ca5b73
commit 6e783865b4
4 changed files with 0 additions and 87 deletions
Download Patch File Download Diff File Expand all files Collapse all files

26
arch/mips/pci/pci-ar71xx.c
View File

@@ -23,7 +23,6 @@
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/pci.h>
#define AR71XX_PCI_REG_CRP_AD_CBE 0x00
#define AR71XX_PCI_REG_CRP_WRDATA 0x04
@@ -335,31 +334,6 @@ static void ar71xx_pci_reset(void)
mdelay(100);
}
__init int ar71xx_pcibios_init(void)
{
u32 t;
ar71xx_pcicfg_base = ioremap(AR71XX_PCI_CFG_BASE, AR71XX_PCI_CFG_SIZE);
if (ar71xx_pcicfg_base == NULL)
return -ENOMEM;
ar71xx_pci_reset();
/* setup COMMAND register */
t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
| PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
ar71xx_pci_local_write(PCI_COMMAND, 4, t);
/* clear bus errors */
ar71xx_pci_check_error(1);
ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2);
register_pci_controller(&ar71xx_pci_controller);
return 0;
}
static int ar71xx_pci_probe(struct platform_device *pdev)
{
struct resource *res;

32
arch/mips/pci/pci-ar724x.c
View File

@@ -15,7 +15,6 @@
#include <linux/platform_device.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/pci.h>
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c
@@ -276,37 +275,6 @@ static void ar724x_pci_irq_init(int irq)
irq_set_chained_handler(irq, ar724x_pci_irq_handler);
}
int ar724x_pcibios_init(int irq)
{
int ret;
ret = -ENOMEM;
ar724x_pci_devcfg_base = ioremap(AR724X_PCI_CFG_BASE,
AR724X_PCI_CFG_SIZE);
if (ar724x_pci_devcfg_base == NULL)
goto err;
ar724x_pci_ctrl_base = ioremap(AR724X_PCI_CTRL_BASE,
AR724X_PCI_CTRL_SIZE);
if (ar724x_pci_ctrl_base == NULL)
goto err_unmap_devcfg;
ar724x_pci_link_up = ar724x_pci_check_link();
if (!ar724x_pci_link_up)
pr_warn("ar724x: PCIe link is down\n");
ar724x_pci_irq_init(irq);
register_pci_controller(&ar724x_pci_controller);
return PCIBIOS_SUCCESSFUL;
err_unmap_devcfg:
iounmap(ar724x_pci_devcfg_base);
err:
return ret;
}
static int ar724x_pci_probe(struct platform_device *pdev)
{
struct resource *res;