sgi-xp: isolate activate IRQ's hardware specific components
Isolate architecture specific code related to XPC's activate IRQ. Signed-off-by: Dean Nelson <dcn@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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committed by
Linus Torvalds

szülő
97bf1aa1e1
commit
6e41017aad
@@ -22,6 +22,87 @@
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static struct xpc_vars_sn2 *xpc_vars; /* >>> Add _sn2 suffix? */
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static struct xpc_vars_part_sn2 *xpc_vars_part; /* >>> Add _sn2 suffix? */
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/* SH_IPI_ACCESS shub register value on startup */
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static u64 xpc_sh1_IPI_access;
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static u64 xpc_sh2_IPI_access0;
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static u64 xpc_sh2_IPI_access1;
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static u64 xpc_sh2_IPI_access2;
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static u64 xpc_sh2_IPI_access3;
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/*
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* Change protections to allow IPI operations.
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*/
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static void
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xpc_allow_IPI_ops_sn2(void)
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{
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int node;
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int nasid;
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/* >>> The following should get moved into SAL. */
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if (is_shub2()) {
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xpc_sh2_IPI_access0 =
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(u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS0));
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xpc_sh2_IPI_access1 =
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(u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS1));
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xpc_sh2_IPI_access2 =
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(u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS2));
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xpc_sh2_IPI_access3 =
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(u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS3));
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for_each_online_node(node) {
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nasid = cnodeid_to_nasid(node);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS0),
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-1UL);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS1),
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-1UL);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS2),
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-1UL);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS3),
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-1UL);
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}
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} else {
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xpc_sh1_IPI_access =
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(u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH1_IPI_ACCESS));
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for_each_online_node(node) {
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nasid = cnodeid_to_nasid(node);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH1_IPI_ACCESS),
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-1UL);
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}
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}
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}
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/*
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* Restrict protections to disallow IPI operations.
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*/
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static void
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xpc_disallow_IPI_ops_sn2(void)
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{
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int node;
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int nasid;
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/* >>> The following should get moved into SAL. */
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if (is_shub2()) {
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for_each_online_node(node) {
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nasid = cnodeid_to_nasid(node);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS0),
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xpc_sh2_IPI_access0);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS1),
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xpc_sh2_IPI_access1);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS2),
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xpc_sh2_IPI_access2);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS3),
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xpc_sh2_IPI_access3);
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}
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} else {
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for_each_online_node(node) {
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nasid = cnodeid_to_nasid(node);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH1_IPI_ACCESS),
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xpc_sh1_IPI_access);
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}
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}
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}
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/*
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* The following set of macros and functions are used for the sending and
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* receiving of IPIs (also known as IRQs). There are two flavors of IPIs,
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@@ -73,6 +154,17 @@ xpc_IPI_init_sn2(int index)
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* IPIs associated with SGI_XPC_ACTIVATE IRQ.
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*/
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/*
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* Notify the heartbeat check thread that an activate IRQ has been received.
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*/
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static irqreturn_t
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xpc_handle_activate_IRQ_sn2(int irq, void *dev_id)
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{
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atomic_inc(&xpc_activate_IRQ_rcvd);
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wake_up_interruptible(&xpc_activate_IRQ_wq);
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return IRQ_HANDLED;
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}
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/*
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* Flag the appropriate AMO variable and send an IPI to the specified node.
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*/
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@@ -100,8 +192,8 @@ xpc_activate_IRQ_send_local_sn2(int from_nasid)
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/* fake the sending and receipt of an activate IRQ from remote nasid */
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FETCHOP_STORE_OP(TO_AMO((u64)&amos[w_index].variable), FETCHOP_OR,
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(1UL << b_index));
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atomic_inc(&xpc_act_IRQ_rcvd);
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wake_up_interruptible(&xpc_act_IRQ_wq);
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atomic_inc(&xpc_activate_IRQ_rcvd);
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wake_up_interruptible(&xpc_activate_IRQ_wq);
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}
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static void
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@@ -383,11 +475,65 @@ xpc_clear_partition_disengage_request_sn2(u64 partid_mask)
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~partid_mask);
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}
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/* original protection values for each node */
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static u64 xpc_prot_vec_sn2[MAX_NUMNODES];
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/*
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* Change protections to allow AMO operations on non-Shub 1.1 systems.
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*/
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static enum xp_retval
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xpc_allow_AMO_ops_sn2(AMO_t *amos_page)
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{
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u64 nasid_array = 0;
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int ret;
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/*
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* On SHUB 1.1, we cannot call sn_change_memprotect() since the BIST
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* collides with memory operations. On those systems we call
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* xpc_allow_AMO_ops_shub_wars_1_1_sn2() instead.
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*/
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if (!enable_shub_wars_1_1()) {
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ret = sn_change_memprotect(ia64_tpa((u64)amos_page), PAGE_SIZE,
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SN_MEMPROT_ACCESS_CLASS_1,
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&nasid_array);
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if (ret != 0)
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return xpSalError;
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}
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return xpSuccess;
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}
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/*
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* Change protections to allow AMO operations on Shub 1.1 systems.
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*/
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static void
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xpc_allow_AMO_ops_shub_wars_1_1_sn2(void)
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{
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int node;
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int nasid;
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if (!enable_shub_wars_1_1())
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return;
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for_each_online_node(node) {
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nasid = cnodeid_to_nasid(node);
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/* save current protection values */
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xpc_prot_vec_sn2[node] =
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(u64)HUB_L((u64 *)GLOBAL_MMR_ADDR(nasid,
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SH1_MD_DQLP_MMR_DIR_PRIVEC0));
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/* open up everything */
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid,
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SH1_MD_DQLP_MMR_DIR_PRIVEC0),
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-1UL);
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HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid,
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SH1_MD_DQRP_MMR_DIR_PRIVEC0),
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-1UL);
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}
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}
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static enum xp_retval
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xpc_rsvd_page_init_sn2(struct xpc_rsvd_page *rp)
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{
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AMO_t *amos_page;
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u64 nasid_array = 0;
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int i;
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int ret;
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@@ -421,21 +567,15 @@ xpc_rsvd_page_init_sn2(struct xpc_rsvd_page *rp)
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}
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/*
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* Open up AMO-R/W to cpu. This is done for Shub 1.1 systems
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* when xpc_allow_IPI_ops() is called via xpc_hb_init().
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* Open up AMO-R/W to cpu. This is done on Shub 1.1 systems
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* when xpc_allow_AMO_ops_shub_wars_1_1_sn2() is called.
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*/
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if (!enable_shub_wars_1_1()) {
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ret = sn_change_memprotect(ia64_tpa((u64)amos_page),
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PAGE_SIZE,
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SN_MEMPROT_ACCESS_CLASS_1,
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&nasid_array);
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if (ret != 0) {
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dev_err(xpc_part, "can't change memory "
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"protections\n");
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uncached_free_page(__IA64_UNCACHED_OFFSET |
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TO_PHYS((u64)amos_page), 1);
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return xpSalError;
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}
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ret = xpc_allow_AMO_ops_sn2(amos_page);
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if (ret != xpSuccess) {
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dev_err(xpc_part, "can't allow AMO operations\n");
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uncached_free_page(__IA64_UNCACHED_OFFSET |
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TO_PHYS((u64)amos_page), 1);
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return ret;
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}
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}
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@@ -656,7 +796,7 @@ xpc_update_partition_info_sn2(struct xpc_partition *part, u8 remote_rp_version,
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* initialized reserved page.
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*/
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static void
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xpc_identify_act_IRQ_req_sn2(int nasid)
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xpc_identify_activate_IRQ_req_sn2(int nasid)
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{
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struct xpc_rsvd_page *remote_rp;
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struct xpc_vars_sn2 *remote_vars;
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@@ -702,10 +842,10 @@ xpc_identify_act_IRQ_req_sn2(int nasid)
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return;
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}
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part->act_IRQ_rcvd++;
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part->activate_IRQ_rcvd++;
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dev_dbg(xpc_part, "partid for nasid %d is %d; IRQs = %d; HB = "
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"%ld:0x%lx\n", (int)nasid, (int)partid, part->act_IRQ_rcvd,
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"%ld:0x%lx\n", (int)nasid, (int)partid, part->activate_IRQ_rcvd,
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remote_vars->heartbeat, remote_vars->heartbeating_to_mask[0]);
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if (xpc_partition_disengaged(part) &&
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@@ -831,7 +971,7 @@ xpc_identify_act_IRQ_req_sn2(int nasid)
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* Return #of IRQs detected.
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*/
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int
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xpc_identify_act_IRQ_sender_sn2(void)
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xpc_identify_activate_IRQ_sender_sn2(void)
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{
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int word, bit;
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u64 nasid_mask;
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@@ -872,7 +1012,7 @@ xpc_identify_act_IRQ_sender_sn2(void)
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nasid = XPC_NASID_FROM_W_B(word, bit);
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dev_dbg(xpc_part, "interrupt from nasid %ld\n",
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nasid);
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xpc_identify_act_IRQ_req_sn2(nasid);
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xpc_identify_activate_IRQ_req_sn2(nasid);
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}
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}
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}
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@@ -880,14 +1020,14 @@ xpc_identify_act_IRQ_sender_sn2(void)
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}
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static void
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xpc_process_act_IRQ_rcvd_sn2(int n_IRQs_expected)
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xpc_process_activate_IRQ_rcvd_sn2(int n_IRQs_expected)
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{
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int n_IRQs_detected;
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n_IRQs_detected = xpc_identify_act_IRQ_sender_sn2();
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n_IRQs_detected = xpc_identify_activate_IRQ_sender_sn2();
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if (n_IRQs_detected < n_IRQs_expected) {
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/* retry once to help avoid missing AMO */
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(void)xpc_identify_act_IRQ_sender_sn2();
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(void)xpc_identify_activate_IRQ_sender_sn2();
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}
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}
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@@ -1775,9 +1915,11 @@ xpc_received_msg_sn2(struct xpc_channel *ch, struct xpc_msg *msg)
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xpc_acknowledge_msgs_sn2(ch, get, msg->flags);
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}
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void
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int
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xpc_init_sn2(void)
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{
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int ret;
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xpc_rsvd_page_init = xpc_rsvd_page_init_sn2;
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xpc_increment_heartbeat = xpc_increment_heartbeat_sn2;
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xpc_offline_heartbeat = xpc_offline_heartbeat_sn2;
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@@ -1788,7 +1930,7 @@ xpc_init_sn2(void)
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xpc_initiate_partition_activation =
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xpc_initiate_partition_activation_sn2;
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xpc_process_act_IRQ_rcvd = xpc_process_act_IRQ_rcvd_sn2;
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xpc_process_activate_IRQ_rcvd = xpc_process_activate_IRQ_rcvd_sn2;
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xpc_setup_infrastructure = xpc_setup_infrastructure_sn2;
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xpc_teardown_infrastructure = xpc_teardown_infrastructure_sn2;
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xpc_make_first_contact = xpc_make_first_contact_sn2;
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@@ -1819,9 +1961,30 @@ xpc_init_sn2(void)
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xpc_send_msg = xpc_send_msg_sn2;
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xpc_received_msg = xpc_received_msg_sn2;
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/* open up protections for IPI and [potentially] AMO operations */
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xpc_allow_IPI_ops_sn2();
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xpc_allow_AMO_ops_shub_wars_1_1_sn2();
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/*
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* This is safe to do before the xpc_hb_checker thread has started
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* because the handler releases a wait queue. If an interrupt is
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* received before the thread is waiting, it will not go to sleep,
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* but rather immediately process the interrupt.
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*/
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ret = request_irq(SGI_XPC_ACTIVATE, xpc_handle_activate_IRQ_sn2, 0,
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"xpc hb", NULL);
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if (ret != 0) {
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dev_err(xpc_part, "can't register ACTIVATE IRQ handler, "
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"errno=%d\n", -ret);
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xpc_disallow_IPI_ops_sn2();
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}
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return ret;
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}
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void
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xpc_exit_sn2(void)
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{
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free_irq(SGI_XPC_ACTIVATE, NULL);
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xpc_disallow_IPI_ops_sn2();
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}
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