FROMLIST: KVM: arm64: Set host stage 2 using kvm_nvhe_init_params
Move the registers relevant to host stage 2 enablement to kvm_nvhe_init_params to prepare the ground for enabling it in later patches. Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Quentin Perret <qperret@google.com> Link: https://lore.kernel.org/r/20210315143536.214621-22-qperret@google.com Bug: 178098380 Change-Id: I41352cec42d80e18c22678505e24be7c1912c52c
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@@ -158,6 +158,9 @@ struct kvm_nvhe_init_params {
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unsigned long tpidr_el2;
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unsigned long tpidr_el2;
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unsigned long stack_hyp_va;
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unsigned long stack_hyp_va;
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phys_addr_t pgd_pa;
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phys_addr_t pgd_pa;
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unsigned long hcr_el2;
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unsigned long vttbr;
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unsigned long vtcr;
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};
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};
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/* Translate a kernel address @ptr into its equivalent linear mapping */
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/* Translate a kernel address @ptr into its equivalent linear mapping */
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@@ -121,6 +121,9 @@ int main(void)
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DEFINE(NVHE_INIT_TPIDR_EL2, offsetof(struct kvm_nvhe_init_params, tpidr_el2));
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DEFINE(NVHE_INIT_TPIDR_EL2, offsetof(struct kvm_nvhe_init_params, tpidr_el2));
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DEFINE(NVHE_INIT_STACK_HYP_VA, offsetof(struct kvm_nvhe_init_params, stack_hyp_va));
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DEFINE(NVHE_INIT_STACK_HYP_VA, offsetof(struct kvm_nvhe_init_params, stack_hyp_va));
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DEFINE(NVHE_INIT_PGD_PA, offsetof(struct kvm_nvhe_init_params, pgd_pa));
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DEFINE(NVHE_INIT_PGD_PA, offsetof(struct kvm_nvhe_init_params, pgd_pa));
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DEFINE(NVHE_INIT_HCR_EL2, offsetof(struct kvm_nvhe_init_params, hcr_el2));
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DEFINE(NVHE_INIT_VTTBR, offsetof(struct kvm_nvhe_init_params, vttbr));
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DEFINE(NVHE_INIT_VTCR, offsetof(struct kvm_nvhe_init_params, vtcr));
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#endif
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#endif
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#ifdef CONFIG_CPU_PM
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#ifdef CONFIG_CPU_PM
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DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
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DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
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@@ -1427,6 +1427,11 @@ static void cpu_prepare_hyp_mode(int cpu)
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params->stack_hyp_va = kern_hyp_va(per_cpu(kvm_arm_hyp_stack_page, cpu) + PAGE_SIZE);
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params->stack_hyp_va = kern_hyp_va(per_cpu(kvm_arm_hyp_stack_page, cpu) + PAGE_SIZE);
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params->pgd_pa = kvm_mmu_get_httbr();
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params->pgd_pa = kvm_mmu_get_httbr();
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if (is_protected_kvm_enabled())
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params->hcr_el2 = HCR_HOST_NVHE_PROTECTED_FLAGS;
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else
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params->hcr_el2 = HCR_HOST_NVHE_FLAGS;
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params->vttbr = params->vtcr = 0;
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/*
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/*
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* Flush the init params from the data cache because the struct will
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* Flush the init params from the data cache because the struct will
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@@ -83,11 +83,6 @@ SYM_CODE_END(__kvm_hyp_init)
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* x0: struct kvm_nvhe_init_params PA
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* x0: struct kvm_nvhe_init_params PA
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*/
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*/
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SYM_CODE_START_LOCAL(___kvm_hyp_init)
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SYM_CODE_START_LOCAL(___kvm_hyp_init)
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alternative_if ARM64_KVM_PROTECTED_MODE
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mov_q x1, HCR_HOST_NVHE_PROTECTED_FLAGS
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msr hcr_el2, x1
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alternative_else_nop_endif
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ldr x1, [x0, #NVHE_INIT_TPIDR_EL2]
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ldr x1, [x0, #NVHE_INIT_TPIDR_EL2]
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msr tpidr_el2, x1
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msr tpidr_el2, x1
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@@ -97,6 +92,15 @@ alternative_else_nop_endif
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ldr x1, [x0, #NVHE_INIT_MAIR_EL2]
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ldr x1, [x0, #NVHE_INIT_MAIR_EL2]
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msr mair_el2, x1
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msr mair_el2, x1
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ldr x1, [x0, #NVHE_INIT_HCR_EL2]
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msr hcr_el2, x1
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ldr x1, [x0, #NVHE_INIT_VTTBR]
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msr vttbr_el2, x1
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ldr x1, [x0, #NVHE_INIT_VTCR]
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msr vtcr_el2, x1
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ldr x1, [x0, #NVHE_INIT_PGD_PA]
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ldr x1, [x0, #NVHE_INIT_PGD_PA]
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phys_to_ttbr x2, x1
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phys_to_ttbr x2, x1
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alternative_if ARM64_HAS_CNP
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alternative_if ARM64_HAS_CNP
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@@ -98,10 +98,7 @@ static void __deactivate_traps(struct kvm_vcpu *vcpu)
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mdcr_el2 |= MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT;
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mdcr_el2 |= MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT;
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write_sysreg(mdcr_el2, mdcr_el2);
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write_sysreg(mdcr_el2, mdcr_el2);
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if (is_protected_kvm_enabled())
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write_sysreg(this_cpu_ptr(&kvm_init_params)->hcr_el2, hcr_el2);
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write_sysreg(HCR_HOST_NVHE_PROTECTED_FLAGS, hcr_el2);
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else
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write_sysreg(HCR_HOST_NVHE_FLAGS, hcr_el2);
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write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
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write_sysreg(CPTR_EL2_DEFAULT, cptr_el2);
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write_sysreg(__kvm_hyp_host_vector, vbar_el2);
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write_sysreg(__kvm_hyp_host_vector, vbar_el2);
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}
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}
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