drm/radeon: use normal BOs for the page tables v4
No need to make it more complicated than necessary, just allocate the page tables as normal BO and flush whenever the address change. v2: update comments and function name v3: squash bug fixes, page directory and tables patch v4: rebased on Mareks changes Signed-off-by: Christian König <christian.koenig@amd.com>
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@@ -1198,7 +1198,6 @@ int radeon_device_init(struct radeon_device *rdev,
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* Max GPUVM size for cayman and SI is 40 bits.
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*/
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rdev->vm_manager.max_pfn = 1 << 20;
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INIT_LIST_HEAD(&rdev->vm_manager.lru_vm);
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/* Set asic functions */
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r = radeon_asic_init(rdev);
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