powerpc: Remove get_irq_desc()
get_irq_desc() is a powerpc-specific version of irq_to_desc(). That is reason enough to remove it, but it also doesn't know about sparse irq_desc support which irq_to_desc() does (when we enable it). Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
此提交包含在:

提交者
Benjamin Herrenschmidt

父節點
59e3f83702
當前提交
6cff46f4bc
@@ -102,7 +102,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
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{
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pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
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get_irq_desc(virq)->status |= IRQ_LEVEL;
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irq_to_desc(virq)->status |= IRQ_LEVEL;
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set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
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return 0;
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}
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@@ -115,11 +115,13 @@ static void cpm2_ack(unsigned int virq)
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static void cpm2_end_irq(unsigned int virq)
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{
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struct irq_desc *desc;
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int bit, word;
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unsigned int irq_nr = virq_to_hw(virq);
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if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
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&& irq_desc[irq_nr].action) {
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desc = irq_to_desc(irq_nr);
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if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))
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&& desc->action) {
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bit = irq_to_siubit[irq_nr];
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word = irq_to_siureg[irq_nr];
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@@ -138,7 +140,7 @@ static void cpm2_end_irq(unsigned int virq)
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static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
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{
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unsigned int src = virq_to_hw(virq);
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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unsigned int vold, vnew, edibit;
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if (flow_type == IRQ_TYPE_NONE)
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@@ -210,7 +212,7 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
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{
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pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw);
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get_irq_desc(virq)->status |= IRQ_LEVEL;
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irq_to_desc(virq)->status |= IRQ_LEVEL;
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set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq);
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return 0;
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}
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@@ -55,7 +55,7 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
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{
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struct irq_chip *chip = &fsl_msi_chip;
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get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
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irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
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set_irq_chip_and_handler(virq, chip, handle_edge_irq);
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@@ -175,12 +175,12 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq,
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/* We block the internal cascade */
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if (hw == 2)
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get_irq_desc(virq)->status |= IRQ_NOREQUEST;
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irq_to_desc(virq)->status |= IRQ_NOREQUEST;
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/* We use the level handler only for now, we might want to
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* be more cautious here but that works for now
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*/
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get_irq_desc(virq)->status |= IRQ_LEVEL;
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irq_to_desc(virq)->status |= IRQ_LEVEL;
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set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq);
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return 0;
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}
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@@ -605,7 +605,7 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
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{
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struct ipic *ipic = ipic_from_irq(virq);
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unsigned int src = ipic_irq_to_hw(virq);
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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unsigned int vold, vnew, edibit;
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if (flow_type == IRQ_TYPE_NONE)
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@@ -72,7 +72,7 @@ static void mpc8xx_end_irq(unsigned int virq)
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static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
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{
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
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@@ -572,7 +572,7 @@ static int irq_choose_cpu(unsigned int virt_irq)
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cpumask_t mask;
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int cpuid;
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cpumask_copy(&mask, irq_desc[virt_irq].affinity);
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cpumask_copy(&mask, irq_to_desc(virt_irq)->affinity);
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if (cpus_equal(mask, CPU_MASK_ALL)) {
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static int irq_rover;
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static DEFINE_SPINLOCK(irq_rover_lock);
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@@ -621,7 +621,7 @@ static struct mpic *mpic_find(unsigned int irq)
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if (irq < NUM_ISA_INTERRUPTS)
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return NULL;
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return irq_desc[irq].chip_data;
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return irq_to_desc(irq)->chip_data;
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}
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/* Determine if the linux irq is an IPI */
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@@ -648,14 +648,14 @@ static inline u32 mpic_physmask(u32 cpumask)
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/* Get the mpic structure from the IPI number */
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static inline struct mpic * mpic_from_ipi(unsigned int ipi)
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{
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return irq_desc[ipi].chip_data;
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return irq_to_desc(ipi)->chip_data;
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}
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#endif
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/* Get the mpic structure from the irq number */
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static inline struct mpic * mpic_from_irq(unsigned int irq)
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{
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return irq_desc[irq].chip_data;
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return irq_to_desc(irq)->chip_data;
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}
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/* Send an EOI */
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@@ -735,7 +735,7 @@ static void mpic_unmask_ht_irq(unsigned int irq)
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mpic_unmask_irq(irq);
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if (irq_desc[irq].status & IRQ_LEVEL)
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if (irq_to_desc(irq)->status & IRQ_LEVEL)
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mpic_ht_end_irq(mpic, src);
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}
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@@ -745,7 +745,7 @@ static unsigned int mpic_startup_ht_irq(unsigned int irq)
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unsigned int src = mpic_irq_to_hw(irq);
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mpic_unmask_irq(irq);
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mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status);
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mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
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return 0;
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}
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@@ -755,7 +755,7 @@ static void mpic_shutdown_ht_irq(unsigned int irq)
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struct mpic *mpic = mpic_from_irq(irq);
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unsigned int src = mpic_irq_to_hw(irq);
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mpic_shutdown_ht_interrupt(mpic, src, irq_desc[irq].status);
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mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
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mpic_mask_irq(irq);
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}
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@@ -772,7 +772,7 @@ static void mpic_end_ht_irq(unsigned int irq)
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* latched another edge interrupt coming in anyway
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*/
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if (irq_desc[irq].status & IRQ_LEVEL)
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if (irq_to_desc(irq)->status & IRQ_LEVEL)
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mpic_ht_end_irq(mpic, src);
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mpic_eoi(mpic);
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}
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@@ -856,7 +856,7 @@ int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
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{
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struct mpic *mpic = mpic_from_irq(virq);
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unsigned int src = mpic_irq_to_hw(virq);
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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unsigned int vecpri, vold, vnew;
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DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
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@@ -213,7 +213,7 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
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{
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int level1;
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get_irq_desc(virq)->status |= IRQ_LEVEL;
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irq_to_desc(virq)->status |= IRQ_LEVEL;
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level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET;
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BUG_ON(level1 > MV64x60_LEVEL1_GPP);
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@@ -189,7 +189,7 @@ static inline void qe_ic_write(volatile __be32 __iomem * base, unsigned int reg
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static inline struct qe_ic *qe_ic_from_irq(unsigned int virq)
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{
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return irq_desc[virq].chip_data;
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return irq_to_desc(virq)->chip_data;
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}
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#define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq)
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@@ -263,7 +263,7 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
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chip = &qe_ic->hc_irq;
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set_irq_chip_data(virq, qe_ic);
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get_irq_desc(virq)->status |= IRQ_LEVEL;
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irq_to_desc(virq)->status |= IRQ_LEVEL;
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set_irq_chip_and_handler(virq, chip, handle_level_irq);
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@@ -398,7 +398,7 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq,
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DBG("%s(%d, 0x%lx)\n", __func__, virq, hw);
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if ((virq >= 1) && (virq <= 4)){
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irq = virq + IRQ_PCI_INTAD_BASE - 1;
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get_irq_desc(irq)->status |= IRQ_LEVEL;
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irq_to_desc(irq)->status |= IRQ_LEVEL;
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set_irq_chip(irq, &tsi108_pci_irq);
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}
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return 0;
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@@ -57,7 +57,7 @@ struct uic {
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static void uic_unmask_irq(unsigned int virq)
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{
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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struct uic *uic = get_irq_chip_data(virq);
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unsigned int src = uic_irq_to_hw(virq);
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unsigned long flags;
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@@ -101,7 +101,7 @@ static void uic_ack_irq(unsigned int virq)
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static void uic_mask_ack_irq(unsigned int virq)
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{
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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struct uic *uic = get_irq_chip_data(virq);
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unsigned int src = uic_irq_to_hw(virq);
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unsigned long flags;
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@@ -129,7 +129,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
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{
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struct uic *uic = get_irq_chip_data(virq);
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unsigned int src = uic_irq_to_hw(virq);
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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unsigned long flags;
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int trigger, polarity;
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u32 tr, pr, mask;
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@@ -79,7 +79,7 @@ static void xilinx_intc_mask(unsigned int virq)
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static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type)
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{
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struct irq_desc *desc = get_irq_desc(virq);
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struct irq_desc *desc = irq_to_desc(virq);
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desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
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desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
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