Merge tag 'char-misc-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big char/misc driver pull request for 5.4-rc1.

  As has been happening in previous releases, more and more individual
  driver subsystem trees are ending up in here. Now if that is good or
  bad I can't tell, but hopefully it makes your life easier as it's more
  of an aggregation of trees together to one merge point for you.

  Anyway, lots of stuff in here:
     - habanalabs driver updates
     - thunderbolt driver updates
     - misc driver updates
     - coresight and intel_th hwtracing driver updates
     - fpga driver updates
     - extcon driver updates
     - some dma driver updates
     - char driver updates
     - android binder driver updates
     - nvmem driver updates
     - phy driver updates
     - parport driver fixes
     - pcmcia driver fix
     - uio driver updates
     - w1 driver updates
     - configfs fixes
     - other assorted driver updates

  All of these have been in linux-next for a long time with no reported
  issues"

* tag 'char-misc-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (200 commits)
  misc: mic: Use PTR_ERR_OR_ZERO rather than its implementation
  habanalabs: correctly cast variable to __le32
  habanalabs: show correct id in error print
  habanalabs: stop using the acronym KMD
  habanalabs: display card name as sensors header
  habanalabs: add uapi to retrieve aggregate H/W events
  habanalabs: add uapi to retrieve device utilization
  habanalabs: Make the Coresight timestamp perpetual
  habanalabs: explicitly set the queue-id enumerated numbers
  habanalabs: print to kernel log when reset is finished
  habanalabs: replace __le32_to_cpu with le32_to_cpu
  habanalabs: replace __cpu_to_le32/64 with cpu_to_le32/64
  habanalabs: Handle HW_IP_INFO if device disabled or in reset
  habanalabs: Expose devices after initialization is done
  habanalabs: improve security in Debug IOCTL
  habanalabs: use default structure for user input in Debug IOCTL
  habanalabs: Add descriptive name to PSOC app status register
  habanalabs: Add descriptive names to PSOC scratch-pad registers
  habanalabs: create two char devices per ASIC
  habanalabs: change device_setup_cdev() to be more generic
  ...
This commit is contained in:
Linus Torvalds
2019-09-18 11:14:31 -07:00
190 changed files with 10379 additions and 2314 deletions

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@@ -210,7 +210,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_FPGA_CONFIG_LOOPBACK \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_LOOPBACK)
/*
/**
* Request INTEL_SIP_SMC_REG_READ
*
* Read a protected register at EL3
@@ -229,7 +229,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_REG_READ \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_READ)
/*
/**
* Request INTEL_SIP_SMC_REG_WRITE
*
* Write a protected register at EL3
@@ -248,7 +248,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_REG_WRITE \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_WRITE)
/*
/**
* Request INTEL_SIP_SMC_FUNCID_REG_UPDATE
*
* Update one or more bits in a protected register at EL3 using a
@@ -269,7 +269,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_REG_UPDATE \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_REG_UPDATE)
/*
/**
* Request INTEL_SIP_SMC_RSU_STATUS
*
* Request remote status update boot log, call is synchronous.
@@ -292,7 +292,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_RSU_STATUS \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_STATUS)
/*
/**
* Request INTEL_SIP_SMC_RSU_UPDATE
*
* Request to set the offset of the bitstream to boot after reboot, call
@@ -310,7 +310,7 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
#define INTEL_SIP_SMC_RSU_UPDATE \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_UPDATE)
/*
/**
* Request INTEL_SIP_SMC_ECC_DBE
*
* Sync call used by service driver at EL1 to alert EL3 that a Double
@@ -329,3 +329,42 @@ INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_FPGA_CONFIG_COMPLETED_WRITE)
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_ECC_DBE)
#endif
/**
* Request INTEL_SIP_SMC_RSU_NOTIFY
*
* Sync call used by service driver at EL1 to report hard processor
* system execution stage to firmware
*
* Call register usage:
* a0 INTEL_SIP_SMC_RSU_NOTIFY
* a1 32bit value representing hard processor system execution stage
* a2-7 not used
*
* Return status
* a0 INTEL_SIP_SMC_STATUS_OK
*/
#define INTEL_SIP_SMC_FUNCID_RSU_NOTIFY 14
#define INTEL_SIP_SMC_RSU_NOTIFY \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_NOTIFY)
/**
* Request INTEL_SIP_SMC_RSU_RETRY_COUNTER
*
* Sync call used by service driver at EL1 to query RSU retry counter
*
* Call register usage:
* a0 INTEL_SIP_SMC_RSU_RETRY_COUNTER
* a1-7 not used
*
* Return status
* a0 INTEL_SIP_SMC_STATUS_OK
* a1 the retry counter
*
* Or
*
* a0 INTEL_SIP_SMC_RSU_ERROR
*/
#define INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER 15
#define INTEL_SIP_SMC_RSU_RETRY_COUNTER \
INTEL_SIP_SMC_FAST_CALL_VAL(INTEL_SIP_SMC_FUNCID_RSU_RETRY_COUNTER)

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@@ -95,6 +95,13 @@ struct stratix10_svc_chan;
*
* @COMMAND_RSU_UPDATE: set the offset of the bitstream to boot after reboot,
* return status is SVC_STATUS_RSU_OK or SVC_STATUS_RSU_ERROR
*
* @COMMAND_RSU_NOTIFY: report the status of hard processor system
* software to firmware, return status is SVC_STATUS_RSU_OK or
* SVC_STATUS_RSU_ERROR
*
* @COMMAND_RSU_RETRY: query firmware for the current image's retry counter,
* return status is SVC_STATUS_RSU_OK or SVC_STATUS_RSU_ERROR
*/
enum stratix10_svc_command_code {
COMMAND_NOOP = 0,
@@ -103,7 +110,9 @@ enum stratix10_svc_command_code {
COMMAND_RECONFIG_DATA_CLAIM,
COMMAND_RECONFIG_STATUS,
COMMAND_RSU_STATUS,
COMMAND_RSU_UPDATE
COMMAND_RSU_UPDATE,
COMMAND_RSU_NOTIFY,
COMMAND_RSU_RETRY,
};
/**

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@@ -13,6 +13,6 @@
#include <linux/io.h>
int alt_pr_register(struct device *dev, void __iomem *reg_base);
int alt_pr_unregister(struct device *dev);
void alt_pr_unregister(struct device *dev);
#endif /* _ALT_PR_IP_CORE_H */

79
include/linux/intel_th.h Normal file
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@@ -0,0 +1,79 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Intel(R) Trace Hub data structures for implementing buffer sinks.
*
* Copyright (C) 2019 Intel Corporation.
*/
#ifndef _INTEL_TH_H_
#define _INTEL_TH_H_
#include <linux/scatterlist.h>
/* MSC operating modes (MSC_MODE) */
enum {
MSC_MODE_SINGLE = 0,
MSC_MODE_MULTI,
MSC_MODE_EXI,
MSC_MODE_DEBUG,
};
struct msu_buffer {
const char *name;
/*
* ->assign() called when buffer 'mode' is set to this driver
* (aka mode_store())
* @device: struct device * of the msc
* @mode: allows the driver to set HW mode (see the enum above)
* Returns: a pointer to a private structure associated with this
* msc or NULL in case of error. This private structure
* will then be passed into all other callbacks.
*/
void *(*assign)(struct device *dev, int *mode);
/* ->unassign(): some other mode is selected, clean up */
void (*unassign)(void *priv);
/*
* ->alloc_window(): allocate memory for the window of a given
* size
* @sgt: pointer to sg_table, can be overridden by the buffer
* driver, or kept intact
* Returns: number of sg table entries <= number of pages;
* 0 is treated as an allocation failure.
*/
int (*alloc_window)(void *priv, struct sg_table **sgt,
size_t size);
void (*free_window)(void *priv, struct sg_table *sgt);
/* ->activate(): trace has started */
void (*activate)(void *priv);
/* ->deactivate(): trace is about to stop */
void (*deactivate)(void *priv);
/*
* ->ready(): window @sgt is filled up to the last block OR
* tracing is stopped by the user; this window contains
* @bytes data. The window in question transitions into
* the "LOCKED" state, indicating that it can't be used
* by hardware. To clear this state and make the window
* available to the hardware again, call
* intel_th_msc_window_unlock().
*/
int (*ready)(void *priv, struct sg_table *sgt, size_t bytes);
};
int intel_th_msu_buffer_register(const struct msu_buffer *mbuf,
struct module *owner);
void intel_th_msu_buffer_unregister(const struct msu_buffer *mbuf);
void intel_th_msc_window_unlock(struct device *dev, struct sg_table *sgt);
#define module_intel_th_msu_buffer(__buffer) \
static int __init __buffer##_init(void) \
{ \
return intel_th_msu_buffer_register(&(__buffer), THIS_MODULE); \
} \
module_init(__buffer##_init); \
static void __exit __buffer##_exit(void) \
{ \
intel_th_msu_buffer_unregister(&(__buffer)); \
} \
module_exit(__buffer##_exit);
#endif /* _INTEL_TH_H_ */

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@@ -36,6 +36,8 @@ struct icc_node *of_icc_xlate_onecell(struct of_phandle_args *spec,
* @nodes: internal list of the interconnect provider nodes
* @set: pointer to device specific set operation function
* @aggregate: pointer to device specific aggregate operation function
* @pre_aggregate: pointer to device specific function that is called
* before the aggregation begins (optional)
* @xlate: provider-specific callback for mapping nodes from phandle arguments
* @dev: the device this interconnect provider belongs to
* @users: count of active users
@@ -45,8 +47,9 @@ struct icc_provider {
struct list_head provider_list;
struct list_head nodes;
int (*set)(struct icc_node *src, struct icc_node *dst);
int (*aggregate)(struct icc_node *node, u32 avg_bw, u32 peak_bw,
u32 *agg_avg, u32 *agg_peak);
int (*aggregate)(struct icc_node *node, u32 tag, u32 avg_bw,
u32 peak_bw, u32 *agg_avg, u32 *agg_peak);
void (*pre_aggregate)(struct icc_node *node);
struct icc_node* (*xlate)(struct of_phandle_args *spec, void *data);
struct device *dev;
int users;

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@@ -30,6 +30,7 @@ struct icc_path *icc_get(struct device *dev, const int src_id,
struct icc_path *of_icc_get(struct device *dev, const char *name);
void icc_put(struct icc_path *path);
int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw);
void icc_set_tag(struct icc_path *path, u32 tag);
#else
@@ -54,6 +55,10 @@ static inline int icc_set_bw(struct icc_path *path, u32 avg_bw, u32 peak_bw)
return 0;
}
static inline void icc_set_tag(struct icc_path *path, u32 tag)
{
}
#endif /* CONFIG_INTERCONNECT */
#endif /* __LINUX_INTERCONNECT_H */

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@@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* SGI One-Wire (W1) IP
*/
#ifndef PLATFORM_DATA_SGI_W1_H
#define PLATFORM_DATA_SGI_W1_H
struct sgi_w1_platform_data {
char dev_id[64];
};
#endif /* PLATFORM_DATA_SGI_W1_H */

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@@ -429,6 +429,7 @@ static inline struct tb_xdomain *tb_service_parent(struct tb_service *svc)
* @lock: Must be held during ring creation/destruction. Is acquired by
* interrupt_work when dispatching interrupts to individual rings.
* @pdev: Pointer to the PCI device
* @ops: NHI specific optional ops
* @iobase: MMIO space of the NHI
* @tx_rings: All Tx rings available on this host controller
* @rx_rings: All Rx rings available on this host controller
@@ -442,6 +443,7 @@ static inline struct tb_xdomain *tb_service_parent(struct tb_service *svc)
struct tb_nhi {
spinlock_t lock;
struct pci_dev *pdev;
const struct tb_nhi_ops *ops;
void __iomem *iobase;
struct tb_ring **tx_rings;
struct tb_ring **rx_rings;

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@@ -118,6 +118,9 @@ typedef void (*w1_slave_found_callback)(struct w1_master *, u64);
* w1_master* is passed to the slave found callback.
* u8 is search_type, W1_SEARCH or W1_ALARM_SEARCH
*
* @dev_id: Optional device id string, which w1 slaves could use for
* creating names, which then give a connection to the w1 master
*
* Note: read_bit and write_bit are very low level functions and should only
* be used with hardware that doesn't really support 1-wire operations,
* like a parallel/serial port.
@@ -150,6 +153,8 @@ struct w1_bus_master {
void (*search)(void *, struct w1_master *,
u8, w1_slave_found_callback);
char *dev_id;
};
/**