Blackfin: add support for the DBGA (debug assert) pseudo insn

A few pseudo debug insns exist to make testing of simulators easier.
Since these don't actually exist in the hardware, we have to have the
exception handler take care of emulating these.  This allows sim test
cases to be executed unmodified under Linux and thus simplify debugging
greatly.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

arch/blackfin/kernel/traps.c

@@ -16,6 +16,7 @@
 #include <linux/irq.h>
 #include <asm/trace.h>
 #include <asm/fixed_code.h>
+#include <asm/pseudo_instructions.h>
 
 #ifdef CONFIG_KGDB
 # include <linux/kgdb.h>
@@ -67,6 +68,9 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
 {
 #ifdef CONFIG_DEBUG_BFIN_HWTRACE_ON
 	int j;
+#endif
+#ifdef CONFIG_BFIN_PSEUDODBG_INSNS
+	int opcode;
 #endif
 	unsigned int cpu = raw_smp_processor_id();
 	const char *strerror = NULL;
@@ -199,6 +203,17 @@ asmlinkage notrace void trap_c(struct pt_regs *fp)
 				panic("BUG()");
 			}
 		}
+#endif
+#ifdef CONFIG_BFIN_PSEUDODBG_INSNS
+		/*
+		 * Support for the fake instructions, if the instruction fails,
+		 * then just execute a illegal opcode failure (like normal).
+		 * Don't support these instructions inside the kernel
+		 */
+		if (!kernel_mode_regs(fp) && get_instruction(&opcode, (unsigned short *)fp->pc)) {
+			if (execute_pseudodbg_assert(fp, opcode))
+				goto traps_done;
+		}
 #endif
 		info.si_code = ILL_ILLOPC;
 		sig = SIGILL;