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drm/radeon: fix endian handling in rlc buffer setup

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The buffers needs to be in little endian format.

Noticed-by: Sylvain BERTRAND <sylware@legeek.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2013-10-23 18:27:10 -04:00
parent 14ac88af15
commit 6ba81e538a
3 changed files with 56 additions and 54 deletions
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47
drivers/gpu/drm/radeon/cik.c
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@@ -5625,7 +5625,7 @@ void cik_init_cp_pg_table(struct radeon_device *rdev)
}
for (i = 0; i < CP_ME_TABLE_SIZE; i ++) {
dst_ptr[bo_offset + i] = be32_to_cpu(fw_data[table_offset + i]);
dst_ptr[bo_offset + i] = cpu_to_le32(be32_to_cpu(fw_data[table_offset + i]));
}
bo_offset += CP_ME_TABLE_SIZE;
}
@@ -5847,52 +5847,53 @@ void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer)
if (buffer == NULL)
return;
buffer[count++] = PACKET3(PACKET3_PREAMBLE_CNTL, 0);
buffer[count++] = PACKET3_PREAMBLE_BEGIN_CLEAR_STATE;
buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);
buffer[count++] = PACKET3(PACKET3_CONTEXT_CONTROL, 1);
buffer[count++] = 0x80000000;
buffer[count++] = 0x80000000;
buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
buffer[count++] = cpu_to_le32(0x80000000);
buffer[count++] = cpu_to_le32(0x80000000);
for (sect = rdev->rlc.cs_data; sect->section != NULL; ++sect) {
for (ext = sect->section; ext->extent != NULL; ++ext) {
if (sect->id == SECT_CONTEXT) {
buffer[count++] = PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count);
buffer[count++] = ext->reg_index - 0xa000;
buffer[count++] =
cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
buffer[count++] = cpu_to_le32(ext->reg_index - 0xa000);
for (i = 0; i < ext->reg_count; i++)
buffer[count++] = ext->extent[i];
buffer[count++] = cpu_to_le32(ext->extent[i]);
} else {
return;
}
}
}
buffer[count++] = PACKET3(PACKET3_SET_CONTEXT_REG, 2);
buffer[count++] = PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START;
buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);
switch (rdev->family) {
case CHIP_BONAIRE:
buffer[count++] = 0x16000012;
buffer[count++] = 0x00000000;
buffer[count++] = cpu_to_le32(0x16000012);
buffer[count++] = cpu_to_le32(0x00000000);
break;
case CHIP_KAVERI:
buffer[count++] = 0x00000000; /* XXX */
buffer[count++] = 0x00000000;
buffer[count++] = cpu_to_le32(0x00000000); /* XXX */
buffer[count++] = cpu_to_le32(0x00000000);
break;
case CHIP_KABINI:
buffer[count++] = 0x00000000; /* XXX */
buffer[count++] = 0x00000000;
buffer[count++] = cpu_to_le32(0x00000000); /* XXX */
buffer[count++] = cpu_to_le32(0x00000000);
break;
default:
buffer[count++] = 0x00000000;
buffer[count++] = 0x00000000;
buffer[count++] = cpu_to_le32(0x00000000);
buffer[count++] = cpu_to_le32(0x00000000);
break;
}
buffer[count++] = PACKET3(PACKET3_PREAMBLE_CNTL, 0);
buffer[count++] = PACKET3_PREAMBLE_END_CLEAR_STATE;
buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);
buffer[count++] = PACKET3(PACKET3_CLEAR_STATE, 0);
buffer[count++] = 0;
buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));
buffer[count++] = cpu_to_le32(0);
}
static void cik_init_pg(struct radeon_device *rdev)