ALSA: hda - Suppress CORBRP clear on Nvidia controller chips
The recent commit (ca460f8652
) changed the CORB RP reset procedure to
follow the specification with a couple of sanity checks.
Unfortunately, Nvidia controller chips seem not following this way,
and spew the warning messages like:
snd_hda_intel 0000:00:10.1: CORB reset timeout#1, CORBRP = 0
This patch adds the workaround for such chips. It just skips the new
reset procedure for the known broken chips.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
@@ -1059,24 +1059,26 @@ static void azx_init_cmd_io(struct azx *chip)
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/* reset the corb hw read pointer */
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azx_writew(chip, CORBRP, ICH6_CORBRP_RST);
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for (timeout = 1000; timeout > 0; timeout--) {
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if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST)
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break;
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udelay(1);
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}
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if (timeout <= 0)
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dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n",
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azx_readw(chip, CORBRP));
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if (!(chip->driver_caps & AZX_DCAPS_CORBRP_SELF_CLEAR)) {
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for (timeout = 1000; timeout > 0; timeout--) {
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if ((azx_readw(chip, CORBRP) & ICH6_CORBRP_RST) == ICH6_CORBRP_RST)
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break;
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udelay(1);
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}
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if (timeout <= 0)
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dev_err(chip->card->dev, "CORB reset timeout#1, CORBRP = %d\n",
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azx_readw(chip, CORBRP));
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azx_writew(chip, CORBRP, 0);
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for (timeout = 1000; timeout > 0; timeout--) {
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if (azx_readw(chip, CORBRP) == 0)
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break;
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udelay(1);
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azx_writew(chip, CORBRP, 0);
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for (timeout = 1000; timeout > 0; timeout--) {
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if (azx_readw(chip, CORBRP) == 0)
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break;
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udelay(1);
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}
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if (timeout <= 0)
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dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
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azx_readw(chip, CORBRP));
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}
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if (timeout <= 0)
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dev_err(chip->card->dev, "CORB reset timeout#2, CORBRP = %d\n",
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azx_readw(chip, CORBRP));
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/* enable corb dma */
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azx_writeb(chip, CORBCTL, ICH6_CORBCTL_RUN);
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