riscv: clean up the macro format in each header file

There are many different formats in each header now, such as
_ASM_XXX_H, __ASM_XXX_H, _ASM_RISCV_XXX_H, RISCV_XXX_H, etc., This patch
tries to unify the format by using _ASM_RISCV_XXX_H, because the most
header use it now. This patch also adds the conditional to the headers
if they lost it.

Signed-off-by: Zong Li <zong.li@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
This commit is contained in:
Zong Li
2019-10-28 00:42:47 -07:00
committed by Paul Walmsley
parent 0fdc636cd9
commit 6b57ba8ed4
15 changed files with 40 additions and 33 deletions

View File

@@ -9,8 +9,8 @@
* (at your option) any later version.
*/
#ifndef _UAPI_ASM_ELF_H
#define _UAPI_ASM_ELF_H
#ifndef _UAPI_ASM_RISCV_ELF_H
#define _UAPI_ASM_RISCV_ELF_H
#include <asm/ptrace.h>
@@ -95,4 +95,4 @@ typedef union __riscv_fp_state elf_fpregset_t;
#define R_RISCV_32_PCREL 57
#endif /* _UAPI_ASM_ELF_H */
#endif /* _UAPI_ASM_RISCV_ELF_H */

View File

@@ -5,8 +5,8 @@
* Copyright (C) 2012 ARM Ltd.
* Copyright (C) 2017 SiFive
*/
#ifndef __UAPI_ASM_HWCAP_H
#define __UAPI_ASM_HWCAP_H
#ifndef _UAPI_ASM_RISCV_HWCAP_H
#define _UAPI_ASM_RISCV_HWCAP_H
/*
* Linux saves the floating-point registers according to the ISA Linux is
@@ -22,4 +22,4 @@
#define COMPAT_HWCAP_ISA_D (1 << ('D' - 'A'))
#define COMPAT_HWCAP_ISA_C (1 << ('C' - 'A'))
#endif
#endif /* _UAPI_ASM_RISCV_HWCAP_H */

View File

@@ -5,8 +5,8 @@
*
* This file was copied from arch/arm64/include/uapi/asm/ucontext.h
*/
#ifndef _UAPI__ASM_UCONTEXT_H
#define _UAPI__ASM_UCONTEXT_H
#ifndef _UAPI_ASM_RISCV_UCONTEXT_H
#define _UAPI_ASM_RISCV_UCONTEXT_H
#include <linux/types.h>
@@ -31,4 +31,4 @@ struct ucontext {
struct sigcontext uc_mcontext;
};
#endif /* _UAPI__ASM_UCONTEXT_H */
#endif /* _UAPI_ASM_RISCV_UCONTEXT_H */