Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux
Pull s390 updates from Martin Schwidefsky: "An optimization for irq-restore, the SSM instruction is quite a bit slower than an if-statement and a STOSM. The copy_file_range system all is added. Cleanup for PCI and CIO. And a couple of bug fixes" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/cio: update measurement characteristics s390/cio: ensure consistent measurement state s390/cio: fix measurement characteristics memleak s390/zcrypt: Fix cryptographic device id in kernel messages s390/pci: remove iomap sanity checks s390/pci: set error state for unusable functions s390/pci: fix bar check s390/pci: resize iomap s390/pci: improve ZPCI_* macros s390/pci: provide ZPCI_ADDR macro s390/pci: adjust IOMAP_MAX_ENTRIES s390/numa: move numa_init_late() from device to arch_initcall s390: remove all usages of PSW_ADDR_INSN s390: remove all usages of PSW_ADDR_AMODE s390: wire up copy_file_range syscall s390: remove superfluous memblock_alloc() return value checks s390/numa: allocate memory with correct alignment s390/irqflags: optimize irq restore s390/mm: use TASK_MAX_SIZE where applicable
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@@ -8,6 +8,8 @@
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#include <linux/types.h>
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#define ARCH_IRQ_ENABLED (3UL << (BITS_PER_LONG - 8))
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/* store then OR system mask. */
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#define __arch_local_irq_stosm(__or) \
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({ \
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@@ -54,14 +56,17 @@ static inline notrace void arch_local_irq_enable(void)
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__arch_local_irq_stosm(0x03);
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}
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/* This only restores external and I/O interrupt state */
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static inline notrace void arch_local_irq_restore(unsigned long flags)
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{
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__arch_local_irq_ssm(flags);
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/* only disabled->disabled and disabled->enabled is valid */
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if (flags & ARCH_IRQ_ENABLED)
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arch_local_irq_enable();
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}
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static inline notrace bool arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & (3UL << (BITS_PER_LONG - 8)));
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return !(flags & ARCH_IRQ_ENABLED);
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}
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static inline notrace bool arch_irqs_disabled(void)
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@@ -8,10 +8,13 @@
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#include <asm/pci_insn.h>
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/* I/O Map */
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#define ZPCI_IOMAP_MAX_ENTRIES 0x7fff
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#define ZPCI_IOMAP_ADDR_BASE 0x8000000000000000ULL
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#define ZPCI_IOMAP_ADDR_IDX_MASK 0x7fff000000000000ULL
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#define ZPCI_IOMAP_ADDR_OFF_MASK 0x0000ffffffffffffULL
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#define ZPCI_IOMAP_SHIFT 48
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#define ZPCI_IOMAP_ADDR_BASE 0x8000000000000000UL
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#define ZPCI_IOMAP_ADDR_OFF_MASK ((1UL << ZPCI_IOMAP_SHIFT) - 1)
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#define ZPCI_IOMAP_MAX_ENTRIES \
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((ULONG_MAX - ZPCI_IOMAP_ADDR_BASE + 1) / (1UL << ZPCI_IOMAP_SHIFT))
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#define ZPCI_IOMAP_ADDR_IDX_MASK \
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(~ZPCI_IOMAP_ADDR_OFF_MASK - ZPCI_IOMAP_ADDR_BASE)
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struct zpci_iomap_entry {
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u32 fh;
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@@ -21,8 +24,9 @@ struct zpci_iomap_entry {
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extern struct zpci_iomap_entry *zpci_iomap_start;
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#define ZPCI_ADDR(idx) (ZPCI_IOMAP_ADDR_BASE | ((u64) idx << ZPCI_IOMAP_SHIFT))
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#define ZPCI_IDX(addr) \
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(((__force u64) addr & ZPCI_IOMAP_ADDR_IDX_MASK) >> 48)
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(((__force u64) addr & ZPCI_IOMAP_ADDR_IDX_MASK) >> ZPCI_IOMAP_SHIFT)
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#define ZPCI_OFFSET(addr) \
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((__force u64) addr & ZPCI_IOMAP_ADDR_OFF_MASK)
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@@ -166,14 +166,14 @@ extern __vector128 init_task_fpu_regs[__NUM_VXRS];
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*/
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#define start_thread(regs, new_psw, new_stackp) do { \
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regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
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regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
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regs->psw.addr = new_psw; \
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regs->gprs[15] = new_stackp; \
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execve_tail(); \
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} while (0)
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#define start_thread31(regs, new_psw, new_stackp) do { \
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regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
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regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
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regs->psw.addr = new_psw; \
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regs->gprs[15] = new_stackp; \
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crst_table_downgrade(current->mm, 1UL << 31); \
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execve_tail(); \
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@@ -149,7 +149,7 @@ static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
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#define arch_has_block_step() (1)
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#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
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#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN)
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#define instruction_pointer(regs) ((regs)->psw.addr)
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#define user_stack_pointer(regs)((regs)->gprs[15])
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#define profile_pc(regs) instruction_pointer(regs)
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@@ -161,7 +161,7 @@ static inline long regs_return_value(struct pt_regs *regs)
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static inline void instruction_pointer_set(struct pt_regs *regs,
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unsigned long val)
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{
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regs->psw.addr = val | PSW_ADDR_AMODE;
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regs->psw.addr = val;
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}
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int regs_query_register_offset(const char *name);
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@@ -171,7 +171,7 @@ unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
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static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
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{
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return regs->gprs[15] & PSW_ADDR_INSN;
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return regs->gprs[15];
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}
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#endif /* __ASSEMBLY__ */
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