xen/PMU: Intercept PMU-related MSR and APIC accesses
Provide interfaces for recognizing accesses to PMU-related MSRs and LVTPC APIC and process these accesses in Xen PMU code. (The interrupt handler performs XENPMU_flush right away in the beginning since no PMU emulation is available. It will be added with a later patch). Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com> Reviewed-by: David Vrabel <david.vrabel@citrix.com> Signed-off-by: David Vrabel <david.vrabel@citrix.com>
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David Vrabel

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@@ -20,6 +20,8 @@
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#define XENPMU_feature_set 3
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#define XENPMU_init 4
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#define XENPMU_finish 5
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#define XENPMU_lvtpc_set 6
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#define XENPMU_flush 7
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/* ` } */
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