locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()
Please do not apply this to mainline directly, instead please re-run the coccinelle script shown below and apply its output. For several reasons, it is desirable to use {READ,WRITE}_ONCE() in preference to ACCESS_ONCE(), and new code is expected to use one of the former. So far, there's been no reason to change most existing uses of ACCESS_ONCE(), as these aren't harmful, and changing them results in churn. However, for some features, the read/write distinction is critical to correct operation. To distinguish these cases, separate read/write accessors must be used. This patch migrates (most) remaining ACCESS_ONCE() instances to {READ,WRITE}_ONCE(), using the following coccinelle script: ---- // Convert trivial ACCESS_ONCE() uses to equivalent READ_ONCE() and // WRITE_ONCE() // $ make coccicheck COCCI=/home/mark/once.cocci SPFLAGS="--include-headers" MODE=patch virtual patch @ depends on patch @ expression E1, E2; @@ - ACCESS_ONCE(E1) = E2 + WRITE_ONCE(E1, E2) @ depends on patch @ expression E; @@ - ACCESS_ONCE(E) + READ_ONCE(E) ---- Signed-off-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: davem@davemloft.net Cc: linux-arch@vger.kernel.org Cc: mpe@ellerman.id.au Cc: shuah@kernel.org Cc: snitzer@redhat.com Cc: thor.thayer@linux.intel.com Cc: tj@kernel.org Cc: viro@zeniv.linux.org.uk Cc: will.deacon@arm.com Link: http://lkml.kernel.org/r/1508792849-3115-19-git-send-email-paulmck@linux.vnet.ibm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Ingo Molnar

parent
b03a0fe0c5
commit
6aa7de0591
@@ -827,7 +827,7 @@ efx_farch_handle_tx_event(struct efx_channel *channel, efx_qword_t *event)
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struct efx_nic *efx = channel->efx;
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int tx_packets = 0;
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if (unlikely(ACCESS_ONCE(efx->reset_pending)))
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if (unlikely(READ_ONCE(efx->reset_pending)))
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return 0;
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if (likely(EFX_QWORD_FIELD(*event, FSF_AZ_TX_EV_COMP))) {
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@@ -979,7 +979,7 @@ efx_farch_handle_rx_event(struct efx_channel *channel, const efx_qword_t *event)
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struct efx_rx_queue *rx_queue;
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struct efx_nic *efx = channel->efx;
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if (unlikely(ACCESS_ONCE(efx->reset_pending)))
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if (unlikely(READ_ONCE(efx->reset_pending)))
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return;
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rx_ev_cont = EFX_QWORD_FIELD(*event, FSF_AZ_RX_EV_JUMBO_CONT);
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@@ -1520,7 +1520,7 @@ irqreturn_t efx_farch_fatal_interrupt(struct efx_nic *efx)
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irqreturn_t efx_farch_legacy_interrupt(int irq, void *dev_id)
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{
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struct efx_nic *efx = dev_id;
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bool soft_enabled = ACCESS_ONCE(efx->irq_soft_enabled);
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bool soft_enabled = READ_ONCE(efx->irq_soft_enabled);
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efx_oword_t *int_ker = efx->irq_status.addr;
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irqreturn_t result = IRQ_NONE;
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struct efx_channel *channel;
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@@ -1612,7 +1612,7 @@ irqreturn_t efx_farch_msi_interrupt(int irq, void *dev_id)
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"IRQ %d on CPU %d status " EFX_OWORD_FMT "\n",
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irq, raw_smp_processor_id(), EFX_OWORD_VAL(*int_ker));
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if (!likely(ACCESS_ONCE(efx->irq_soft_enabled)))
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if (!likely(READ_ONCE(efx->irq_soft_enabled)))
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return IRQ_HANDLED;
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/* Handle non-event-queue sources */
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