mtd: flash drivers set ecc strength
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the maximum number of bit errors that can be corrected in one writesize region. Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl, which is the maximum number of bit errors that can be corrected in one ecc step. Nand infrastructure code translates this to 'ecc_strength'. Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the driver for all other modes. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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committed by
David Woodhouse

parent
1d0b95b083
commit
6a918bade9
@@ -3350,6 +3350,7 @@ int nand_scan_tail(struct mtd_info *mtd)
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if (!chip->ecc.size)
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chip->ecc.size = 256;
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chip->ecc.bytes = 3;
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chip->ecc.strength = 1;
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break;
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case NAND_ECC_SOFT_BCH:
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@@ -3384,6 +3385,8 @@ int nand_scan_tail(struct mtd_info *mtd)
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pr_warn("BCH ECC initialization failed!\n");
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BUG();
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}
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chip->ecc.strength =
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chip->ecc.bytes*8 / fls(8*chip->ecc.size);
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break;
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case NAND_ECC_NONE:
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@@ -3397,6 +3400,7 @@ int nand_scan_tail(struct mtd_info *mtd)
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chip->ecc.write_oob = nand_write_oob_std;
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chip->ecc.size = mtd->writesize;
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chip->ecc.bytes = 0;
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chip->ecc.strength = 0;
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break;
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default:
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@@ -3478,8 +3482,9 @@ int nand_scan_tail(struct mtd_info *mtd)
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mtd->_block_markbad = nand_block_markbad;
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mtd->writebufsize = mtd->writesize;
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/* propagate ecc.layout to mtd_info */
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/* propagate ecc info to mtd_info */
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mtd->ecclayout = chip->ecc.layout;
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mtd->ecc_strength = chip->ecc.strength * chip->ecc.steps;
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/* Check, if we should skip the bad block table scan */
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if (chip->options & NAND_SKIP_BBTSCAN)
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