mtd: flash drivers set ecc strength
Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the maximum number of bit errors that can be corrected in one writesize region. Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl, which is the maximum number of bit errors that can be corrected in one ecc step. Nand infrastructure code translates this to 'ecc_strength'. Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the driver for all other modes. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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committed by
David Woodhouse

parent
1d0b95b083
commit
6a918bade9
@@ -1590,6 +1590,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
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ECC_15BITS * (denali->mtd.writesize /
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ECC_SECTOR_SIZE)))) {
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/* if MLC OOB size is large enough, use 15bit ECC*/
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denali->nand.ecc.strength = 15;
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denali->nand.ecc.layout = &nand_15bit_oob;
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denali->nand.ecc.bytes = ECC_15BITS;
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iowrite32(15, denali->flash_reg + ECC_CORRECTION);
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@@ -1600,12 +1601,14 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
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" contain 8bit ECC correction codes");
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goto failed_req_irq;
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} else {
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denali->nand.ecc.strength = 8;
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denali->nand.ecc.layout = &nand_8bit_oob;
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denali->nand.ecc.bytes = ECC_8BITS;
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iowrite32(8, denali->flash_reg + ECC_CORRECTION);
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}
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denali->nand.ecc.bytes *= denali->devnum;
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denali->nand.ecc.strength *= denali->devnum;
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denali->nand.ecc.layout->eccbytes *=
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denali->mtd.writesize / ECC_SECTOR_SIZE;
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denali->nand.ecc.layout->oobfree[0].offset =
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