objtool: Move synced files to their original relative locations
This will enable more straightforward comparisons, and it also makes the files 100% identical. Suggested-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/407b2aaa317741f48fcf821592c0e96ab3be1890.1509974346.git.jpoimboe@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Josh Poimboeuf
committed by
Ingo Molnar
Ingo Molnar
parent
10259821ac
commit
6a77cff819
234
tools/objtool/arch/x86/include/asm/inat.h
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234
tools/objtool/arch/x86/include/asm/inat.h
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@@ -0,0 +1,234 @@
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#ifndef _ASM_X86_INAT_H
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#define _ASM_X86_INAT_H
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/*
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* x86 instruction attributes
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*
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* Written by Masami Hiramatsu <mhiramat@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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*/
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#include <asm/inat_types.h>
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/*
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* Internal bits. Don't use bitmasks directly, because these bits are
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* unstable. You should use checking functions.
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*/
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#define INAT_OPCODE_TABLE_SIZE 256
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#define INAT_GROUP_TABLE_SIZE 8
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/* Legacy last prefixes */
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#define INAT_PFX_OPNDSZ 1 /* 0x66 */ /* LPFX1 */
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#define INAT_PFX_REPE 2 /* 0xF3 */ /* LPFX2 */
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#define INAT_PFX_REPNE 3 /* 0xF2 */ /* LPFX3 */
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/* Other Legacy prefixes */
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#define INAT_PFX_LOCK 4 /* 0xF0 */
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#define INAT_PFX_CS 5 /* 0x2E */
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#define INAT_PFX_DS 6 /* 0x3E */
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#define INAT_PFX_ES 7 /* 0x26 */
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#define INAT_PFX_FS 8 /* 0x64 */
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#define INAT_PFX_GS 9 /* 0x65 */
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#define INAT_PFX_SS 10 /* 0x36 */
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#define INAT_PFX_ADDRSZ 11 /* 0x67 */
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/* x86-64 REX prefix */
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#define INAT_PFX_REX 12 /* 0x4X */
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/* AVX VEX prefixes */
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#define INAT_PFX_VEX2 13 /* 2-bytes VEX prefix */
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#define INAT_PFX_VEX3 14 /* 3-bytes VEX prefix */
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#define INAT_PFX_EVEX 15 /* EVEX prefix */
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#define INAT_LSTPFX_MAX 3
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#define INAT_LGCPFX_MAX 11
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/* Immediate size */
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#define INAT_IMM_BYTE 1
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#define INAT_IMM_WORD 2
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#define INAT_IMM_DWORD 3
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#define INAT_IMM_QWORD 4
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#define INAT_IMM_PTR 5
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#define INAT_IMM_VWORD32 6
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#define INAT_IMM_VWORD 7
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/* Legacy prefix */
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#define INAT_PFX_OFFS 0
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#define INAT_PFX_BITS 4
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#define INAT_PFX_MAX ((1 << INAT_PFX_BITS) - 1)
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#define INAT_PFX_MASK (INAT_PFX_MAX << INAT_PFX_OFFS)
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/* Escape opcodes */
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#define INAT_ESC_OFFS (INAT_PFX_OFFS + INAT_PFX_BITS)
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#define INAT_ESC_BITS 2
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#define INAT_ESC_MAX ((1 << INAT_ESC_BITS) - 1)
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#define INAT_ESC_MASK (INAT_ESC_MAX << INAT_ESC_OFFS)
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/* Group opcodes (1-16) */
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#define INAT_GRP_OFFS (INAT_ESC_OFFS + INAT_ESC_BITS)
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#define INAT_GRP_BITS 5
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#define INAT_GRP_MAX ((1 << INAT_GRP_BITS) - 1)
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#define INAT_GRP_MASK (INAT_GRP_MAX << INAT_GRP_OFFS)
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/* Immediates */
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#define INAT_IMM_OFFS (INAT_GRP_OFFS + INAT_GRP_BITS)
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#define INAT_IMM_BITS 3
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#define INAT_IMM_MASK (((1 << INAT_IMM_BITS) - 1) << INAT_IMM_OFFS)
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/* Flags */
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#define INAT_FLAG_OFFS (INAT_IMM_OFFS + INAT_IMM_BITS)
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#define INAT_MODRM (1 << (INAT_FLAG_OFFS))
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#define INAT_FORCE64 (1 << (INAT_FLAG_OFFS + 1))
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#define INAT_SCNDIMM (1 << (INAT_FLAG_OFFS + 2))
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#define INAT_MOFFSET (1 << (INAT_FLAG_OFFS + 3))
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#define INAT_VARIANT (1 << (INAT_FLAG_OFFS + 4))
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#define INAT_VEXOK (1 << (INAT_FLAG_OFFS + 5))
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#define INAT_VEXONLY (1 << (INAT_FLAG_OFFS + 6))
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#define INAT_EVEXONLY (1 << (INAT_FLAG_OFFS + 7))
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/* Attribute making macros for attribute tables */
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#define INAT_MAKE_PREFIX(pfx) (pfx << INAT_PFX_OFFS)
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#define INAT_MAKE_ESCAPE(esc) (esc << INAT_ESC_OFFS)
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#define INAT_MAKE_GROUP(grp) ((grp << INAT_GRP_OFFS) | INAT_MODRM)
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#define INAT_MAKE_IMM(imm) (imm << INAT_IMM_OFFS)
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/* Attribute search APIs */
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extern insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode);
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extern int inat_get_last_prefix_id(insn_byte_t last_pfx);
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extern insn_attr_t inat_get_escape_attribute(insn_byte_t opcode,
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int lpfx_id,
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insn_attr_t esc_attr);
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extern insn_attr_t inat_get_group_attribute(insn_byte_t modrm,
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int lpfx_id,
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insn_attr_t esc_attr);
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extern insn_attr_t inat_get_avx_attribute(insn_byte_t opcode,
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insn_byte_t vex_m,
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insn_byte_t vex_pp);
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/* Attribute checking functions */
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static inline int inat_is_legacy_prefix(insn_attr_t attr)
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{
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attr &= INAT_PFX_MASK;
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return attr && attr <= INAT_LGCPFX_MAX;
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}
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static inline int inat_is_address_size_prefix(insn_attr_t attr)
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{
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return (attr & INAT_PFX_MASK) == INAT_PFX_ADDRSZ;
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}
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static inline int inat_is_operand_size_prefix(insn_attr_t attr)
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{
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return (attr & INAT_PFX_MASK) == INAT_PFX_OPNDSZ;
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}
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static inline int inat_is_rex_prefix(insn_attr_t attr)
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{
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return (attr & INAT_PFX_MASK) == INAT_PFX_REX;
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}
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static inline int inat_last_prefix_id(insn_attr_t attr)
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{
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if ((attr & INAT_PFX_MASK) > INAT_LSTPFX_MAX)
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return 0;
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else
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return attr & INAT_PFX_MASK;
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}
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static inline int inat_is_vex_prefix(insn_attr_t attr)
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{
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attr &= INAT_PFX_MASK;
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return attr == INAT_PFX_VEX2 || attr == INAT_PFX_VEX3 ||
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attr == INAT_PFX_EVEX;
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}
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static inline int inat_is_evex_prefix(insn_attr_t attr)
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{
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return (attr & INAT_PFX_MASK) == INAT_PFX_EVEX;
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}
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static inline int inat_is_vex3_prefix(insn_attr_t attr)
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{
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return (attr & INAT_PFX_MASK) == INAT_PFX_VEX3;
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}
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static inline int inat_is_escape(insn_attr_t attr)
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{
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return attr & INAT_ESC_MASK;
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}
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static inline int inat_escape_id(insn_attr_t attr)
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{
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return (attr & INAT_ESC_MASK) >> INAT_ESC_OFFS;
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}
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static inline int inat_is_group(insn_attr_t attr)
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{
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return attr & INAT_GRP_MASK;
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}
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static inline int inat_group_id(insn_attr_t attr)
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{
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return (attr & INAT_GRP_MASK) >> INAT_GRP_OFFS;
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}
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static inline int inat_group_common_attribute(insn_attr_t attr)
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{
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return attr & ~INAT_GRP_MASK;
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}
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static inline int inat_has_immediate(insn_attr_t attr)
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{
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return attr & INAT_IMM_MASK;
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}
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static inline int inat_immediate_size(insn_attr_t attr)
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{
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return (attr & INAT_IMM_MASK) >> INAT_IMM_OFFS;
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}
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static inline int inat_has_modrm(insn_attr_t attr)
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{
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return attr & INAT_MODRM;
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}
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static inline int inat_is_force64(insn_attr_t attr)
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{
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return attr & INAT_FORCE64;
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}
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static inline int inat_has_second_immediate(insn_attr_t attr)
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{
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return attr & INAT_SCNDIMM;
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}
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static inline int inat_has_moffset(insn_attr_t attr)
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{
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return attr & INAT_MOFFSET;
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}
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static inline int inat_has_variant(insn_attr_t attr)
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{
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return attr & INAT_VARIANT;
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}
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static inline int inat_accept_vex(insn_attr_t attr)
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{
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return attr & INAT_VEXOK;
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}
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static inline int inat_must_vex(insn_attr_t attr)
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{
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return attr & (INAT_VEXONLY | INAT_EVEXONLY);
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}
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static inline int inat_must_evex(insn_attr_t attr)
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{
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return attr & INAT_EVEXONLY;
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}
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#endif
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29
tools/objtool/arch/x86/include/asm/inat_types.h
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29
tools/objtool/arch/x86/include/asm/inat_types.h
Normal file
@@ -0,0 +1,29 @@
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#ifndef _ASM_X86_INAT_TYPES_H
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#define _ASM_X86_INAT_TYPES_H
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/*
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* x86 instruction attributes
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*
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* Written by Masami Hiramatsu <mhiramat@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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*/
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/* Instruction attributes */
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typedef unsigned int insn_attr_t;
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typedef unsigned char insn_byte_t;
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typedef signed int insn_value_t;
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#endif
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211
tools/objtool/arch/x86/include/asm/insn.h
Normal file
211
tools/objtool/arch/x86/include/asm/insn.h
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@@ -0,0 +1,211 @@
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#ifndef _ASM_X86_INSN_H
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#define _ASM_X86_INSN_H
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/*
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* x86 instruction analysis
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* Copyright (C) IBM Corporation, 2009
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*/
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/* insn_attr_t is defined in inat.h */
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#include <asm/inat.h>
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struct insn_field {
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union {
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insn_value_t value;
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insn_byte_t bytes[4];
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};
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/* !0 if we've run insn_get_xxx() for this field */
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unsigned char got;
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unsigned char nbytes;
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};
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struct insn {
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struct insn_field prefixes; /*
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* Prefixes
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* prefixes.bytes[3]: last prefix
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*/
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struct insn_field rex_prefix; /* REX prefix */
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struct insn_field vex_prefix; /* VEX prefix */
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struct insn_field opcode; /*
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* opcode.bytes[0]: opcode1
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* opcode.bytes[1]: opcode2
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* opcode.bytes[2]: opcode3
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*/
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struct insn_field modrm;
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struct insn_field sib;
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struct insn_field displacement;
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union {
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struct insn_field immediate;
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struct insn_field moffset1; /* for 64bit MOV */
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struct insn_field immediate1; /* for 64bit imm or off16/32 */
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};
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union {
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struct insn_field moffset2; /* for 64bit MOV */
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struct insn_field immediate2; /* for 64bit imm or seg16 */
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};
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insn_attr_t attr;
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unsigned char opnd_bytes;
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unsigned char addr_bytes;
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unsigned char length;
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unsigned char x86_64;
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const insn_byte_t *kaddr; /* kernel address of insn to analyze */
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const insn_byte_t *end_kaddr; /* kernel address of last insn in buffer */
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const insn_byte_t *next_byte;
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};
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#define MAX_INSN_SIZE 15
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#define X86_MODRM_MOD(modrm) (((modrm) & 0xc0) >> 6)
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#define X86_MODRM_REG(modrm) (((modrm) & 0x38) >> 3)
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#define X86_MODRM_RM(modrm) ((modrm) & 0x07)
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#define X86_SIB_SCALE(sib) (((sib) & 0xc0) >> 6)
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#define X86_SIB_INDEX(sib) (((sib) & 0x38) >> 3)
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#define X86_SIB_BASE(sib) ((sib) & 0x07)
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#define X86_REX_W(rex) ((rex) & 8)
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#define X86_REX_R(rex) ((rex) & 4)
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#define X86_REX_X(rex) ((rex) & 2)
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#define X86_REX_B(rex) ((rex) & 1)
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/* VEX bit flags */
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#define X86_VEX_W(vex) ((vex) & 0x80) /* VEX3 Byte2 */
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#define X86_VEX_R(vex) ((vex) & 0x80) /* VEX2/3 Byte1 */
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#define X86_VEX_X(vex) ((vex) & 0x40) /* VEX3 Byte1 */
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#define X86_VEX_B(vex) ((vex) & 0x20) /* VEX3 Byte1 */
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#define X86_VEX_L(vex) ((vex) & 0x04) /* VEX3 Byte2, VEX2 Byte1 */
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/* VEX bit fields */
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#define X86_EVEX_M(vex) ((vex) & 0x03) /* EVEX Byte1 */
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#define X86_VEX3_M(vex) ((vex) & 0x1f) /* VEX3 Byte1 */
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#define X86_VEX2_M 1 /* VEX2.M always 1 */
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#define X86_VEX_V(vex) (((vex) & 0x78) >> 3) /* VEX3 Byte2, VEX2 Byte1 */
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#define X86_VEX_P(vex) ((vex) & 0x03) /* VEX3 Byte2, VEX2 Byte1 */
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#define X86_VEX_M_MAX 0x1f /* VEX3.M Maximum value */
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extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);
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extern void insn_get_prefixes(struct insn *insn);
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extern void insn_get_opcode(struct insn *insn);
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extern void insn_get_modrm(struct insn *insn);
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extern void insn_get_sib(struct insn *insn);
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extern void insn_get_displacement(struct insn *insn);
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extern void insn_get_immediate(struct insn *insn);
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extern void insn_get_length(struct insn *insn);
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||||
/* Attribute will be determined after getting ModRM (for opcode groups) */
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static inline void insn_get_attribute(struct insn *insn)
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{
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insn_get_modrm(insn);
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}
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||||
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||||
/* Instruction uses RIP-relative addressing */
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extern int insn_rip_relative(struct insn *insn);
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/* Init insn for kernel text */
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static inline void kernel_insn_init(struct insn *insn,
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const void *kaddr, int buf_len)
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{
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#ifdef CONFIG_X86_64
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insn_init(insn, kaddr, buf_len, 1);
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#else /* CONFIG_X86_32 */
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insn_init(insn, kaddr, buf_len, 0);
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#endif
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}
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||||
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static inline int insn_is_avx(struct insn *insn)
|
||||
{
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if (!insn->prefixes.got)
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insn_get_prefixes(insn);
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return (insn->vex_prefix.value != 0);
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}
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||||
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static inline int insn_is_evex(struct insn *insn)
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{
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if (!insn->prefixes.got)
|
||||
insn_get_prefixes(insn);
|
||||
return (insn->vex_prefix.nbytes == 4);
|
||||
}
|
||||
|
||||
/* Ensure this instruction is decoded completely */
|
||||
static inline int insn_complete(struct insn *insn)
|
||||
{
|
||||
return insn->opcode.got && insn->modrm.got && insn->sib.got &&
|
||||
insn->displacement.got && insn->immediate.got;
|
||||
}
|
||||
|
||||
static inline insn_byte_t insn_vex_m_bits(struct insn *insn)
|
||||
{
|
||||
if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */
|
||||
return X86_VEX2_M;
|
||||
else if (insn->vex_prefix.nbytes == 3) /* 3 bytes VEX */
|
||||
return X86_VEX3_M(insn->vex_prefix.bytes[1]);
|
||||
else /* EVEX */
|
||||
return X86_EVEX_M(insn->vex_prefix.bytes[1]);
|
||||
}
|
||||
|
||||
static inline insn_byte_t insn_vex_p_bits(struct insn *insn)
|
||||
{
|
||||
if (insn->vex_prefix.nbytes == 2) /* 2 bytes VEX */
|
||||
return X86_VEX_P(insn->vex_prefix.bytes[1]);
|
||||
else
|
||||
return X86_VEX_P(insn->vex_prefix.bytes[2]);
|
||||
}
|
||||
|
||||
/* Get the last prefix id from last prefix or VEX prefix */
|
||||
static inline int insn_last_prefix_id(struct insn *insn)
|
||||
{
|
||||
if (insn_is_avx(insn))
|
||||
return insn_vex_p_bits(insn); /* VEX_p is a SIMD prefix id */
|
||||
|
||||
if (insn->prefixes.bytes[3])
|
||||
return inat_get_last_prefix_id(insn->prefixes.bytes[3]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Offset of each field from kaddr */
|
||||
static inline int insn_offset_rex_prefix(struct insn *insn)
|
||||
{
|
||||
return insn->prefixes.nbytes;
|
||||
}
|
||||
static inline int insn_offset_vex_prefix(struct insn *insn)
|
||||
{
|
||||
return insn_offset_rex_prefix(insn) + insn->rex_prefix.nbytes;
|
||||
}
|
||||
static inline int insn_offset_opcode(struct insn *insn)
|
||||
{
|
||||
return insn_offset_vex_prefix(insn) + insn->vex_prefix.nbytes;
|
||||
}
|
||||
static inline int insn_offset_modrm(struct insn *insn)
|
||||
{
|
||||
return insn_offset_opcode(insn) + insn->opcode.nbytes;
|
||||
}
|
||||
static inline int insn_offset_sib(struct insn *insn)
|
||||
{
|
||||
return insn_offset_modrm(insn) + insn->modrm.nbytes;
|
||||
}
|
||||
static inline int insn_offset_displacement(struct insn *insn)
|
||||
{
|
||||
return insn_offset_sib(insn) + insn->sib.nbytes;
|
||||
}
|
||||
static inline int insn_offset_immediate(struct insn *insn)
|
||||
{
|
||||
return insn_offset_displacement(insn) + insn->displacement.nbytes;
|
||||
}
|
||||
|
||||
#endif /* _ASM_X86_INSN_H */
|
||||
107
tools/objtool/arch/x86/include/asm/orc_types.h
Normal file
107
tools/objtool/arch/x86/include/asm/orc_types.h
Normal file
@@ -0,0 +1,107 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Josh Poimboeuf <jpoimboe@redhat.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version 2
|
||||
* of the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef _ORC_TYPES_H
|
||||
#define _ORC_TYPES_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/compiler.h>
|
||||
|
||||
/*
|
||||
* The ORC_REG_* registers are base registers which are used to find other
|
||||
* registers on the stack.
|
||||
*
|
||||
* ORC_REG_PREV_SP, also known as DWARF Call Frame Address (CFA), is the
|
||||
* address of the previous frame: the caller's SP before it called the current
|
||||
* function.
|
||||
*
|
||||
* ORC_REG_UNDEFINED means the corresponding register's value didn't change in
|
||||
* the current frame.
|
||||
*
|
||||
* The most commonly used base registers are SP and BP -- which the previous SP
|
||||
* is usually based on -- and PREV_SP and UNDEFINED -- which the previous BP is
|
||||
* usually based on.
|
||||
*
|
||||
* The rest of the base registers are needed for special cases like entry code
|
||||
* and GCC realigned stacks.
|
||||
*/
|
||||
#define ORC_REG_UNDEFINED 0
|
||||
#define ORC_REG_PREV_SP 1
|
||||
#define ORC_REG_DX 2
|
||||
#define ORC_REG_DI 3
|
||||
#define ORC_REG_BP 4
|
||||
#define ORC_REG_SP 5
|
||||
#define ORC_REG_R10 6
|
||||
#define ORC_REG_R13 7
|
||||
#define ORC_REG_BP_INDIRECT 8
|
||||
#define ORC_REG_SP_INDIRECT 9
|
||||
#define ORC_REG_MAX 15
|
||||
|
||||
/*
|
||||
* ORC_TYPE_CALL: Indicates that sp_reg+sp_offset resolves to PREV_SP (the
|
||||
* caller's SP right before it made the call). Used for all callable
|
||||
* functions, i.e. all C code and all callable asm functions.
|
||||
*
|
||||
* ORC_TYPE_REGS: Used in entry code to indicate that sp_reg+sp_offset points
|
||||
* to a fully populated pt_regs from a syscall, interrupt, or exception.
|
||||
*
|
||||
* ORC_TYPE_REGS_IRET: Used in entry code to indicate that sp_reg+sp_offset
|
||||
* points to the iret return frame.
|
||||
*
|
||||
* The UNWIND_HINT macros are used only for the unwind_hint struct. They
|
||||
* aren't used in struct orc_entry due to size and complexity constraints.
|
||||
* Objtool converts them to real types when it converts the hints to orc
|
||||
* entries.
|
||||
*/
|
||||
#define ORC_TYPE_CALL 0
|
||||
#define ORC_TYPE_REGS 1
|
||||
#define ORC_TYPE_REGS_IRET 2
|
||||
#define UNWIND_HINT_TYPE_SAVE 3
|
||||
#define UNWIND_HINT_TYPE_RESTORE 4
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
/*
|
||||
* This struct is more or less a vastly simplified version of the DWARF Call
|
||||
* Frame Information standard. It contains only the necessary parts of DWARF
|
||||
* CFI, simplified for ease of access by the in-kernel unwinder. It tells the
|
||||
* unwinder how to find the previous SP and BP (and sometimes entry regs) on
|
||||
* the stack for a given code address. Each instance of the struct corresponds
|
||||
* to one or more code locations.
|
||||
*/
|
||||
struct orc_entry {
|
||||
s16 sp_offset;
|
||||
s16 bp_offset;
|
||||
unsigned sp_reg:4;
|
||||
unsigned bp_reg:4;
|
||||
unsigned type:2;
|
||||
} __packed;
|
||||
|
||||
/*
|
||||
* This struct is used by asm and inline asm code to manually annotate the
|
||||
* location of registers on the stack for the ORC unwinder.
|
||||
*
|
||||
* Type can be either ORC_TYPE_* or UNWIND_HINT_TYPE_*.
|
||||
*/
|
||||
struct unwind_hint {
|
||||
u32 ip;
|
||||
s16 sp_offset;
|
||||
u8 sp_reg;
|
||||
u8 type;
|
||||
};
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _ORC_TYPES_H */
|
||||
Reference in New Issue
Block a user