MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions
MIPS R6 uses the <R6 ldc2 opcode for the new BEQZC and JIC instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
This commit is contained in:
@@ -678,6 +678,13 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
|
||||
*contpc = regs->cp0_epc + dec_insn.pc_inc +
|
||||
dec_insn.next_pc_inc;
|
||||
|
||||
return 1;
|
||||
case beqzcjic_op:
|
||||
if (!cpu_has_mips_r6)
|
||||
break;
|
||||
*contpc = regs->cp0_epc + dec_insn.pc_inc +
|
||||
dec_insn.next_pc_inc;
|
||||
|
||||
return 1;
|
||||
#endif
|
||||
case cop0_op:
|
||||
|
Reference in New Issue
Block a user