Merge remote-tracking branches 'asoc/topic/davinci' and 'asoc/topic/dpcm' into asoc-next
此提交包含在：
Mark Brown
@@ -107,6 +107,7 @@ struct davinci_mcasp {
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#endif
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struct davinci_mcasp_ruledata ruledata[2];
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struct snd_pcm_hw_constraint_list chconstr[2];
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};
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static inline void mcasp_set_bits(struct davinci_mcasp *mcasp, u32 offset,
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@@ -915,15 +916,12 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
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* the machine driver, we need to calculate the ratio.
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*/
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if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) {
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int channels = params_channels(params);
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int slots = mcasp->tdm_slots;
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int rate = params_rate(params);
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int sbits = params_width(params);
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int ppm, div;
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if (channels > mcasp->tdm_slots)
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channels = mcasp->tdm_slots;
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div = davinci_mcasp_calc_clk_div(mcasp, rate*sbits*channels,
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div = davinci_mcasp_calc_clk_div(mcasp, rate*sbits*slots,
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&ppm);
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if (ppm)
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dev_info(mcasp->dev, "Sample-rate is off by %d PPM\n",
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@@ -1024,31 +1022,36 @@ static int davinci_mcasp_hw_rule_rate(struct snd_pcm_hw_params *params,
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struct snd_interval *ri =
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hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
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int sbits = params_width(params);
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int channels = params_channels(params);
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unsigned int list[ARRAY_SIZE(davinci_mcasp_dai_rates)];
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int i, count = 0;
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int slots = rd->mcasp->tdm_slots;
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struct snd_interval range;
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int i;
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if (channels > rd->mcasp->tdm_slots)
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channels = rd->mcasp->tdm_slots;
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snd_interval_any(&range);
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range.empty = 1;
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for (i = 0; i < ARRAY_SIZE(davinci_mcasp_dai_rates); i++) {
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if (ri->min <= davinci_mcasp_dai_rates[i] &&
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ri->max >= davinci_mcasp_dai_rates[i]) {
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uint bclk_freq = sbits*channels*
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if (snd_interval_test(ri, davinci_mcasp_dai_rates[i])) {
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uint bclk_freq = sbits*slots*
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davinci_mcasp_dai_rates[i];
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int ppm;
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davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm);
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if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM)
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list[count++] = davinci_mcasp_dai_rates[i];
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if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
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if (range.empty) {
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range.min = davinci_mcasp_dai_rates[i];
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range.empty = 0;
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}
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range.max = davinci_mcasp_dai_rates[i];
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}
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}
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}
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dev_dbg(rd->mcasp->dev,
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"%d frequencies (%d-%d) for %d sbits and %d channels\n",
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count, ri->min, ri->max, sbits, channels);
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return snd_interval_list(hw_param_interval(params, rule->var),
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count, list, 0);
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dev_dbg(rd->mcasp->dev,
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"Frequencies %d-%d -> %d-%d for %d sbits and %d tdm slots\n",
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ri->min, ri->max, range.min, range.max, sbits, slots);
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return snd_interval_refine(hw_param_interval(params, rule->var),
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&range);
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}
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static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params,
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@@ -1058,17 +1061,14 @@ static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params,
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struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
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struct snd_mask nfmt;
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int rate = params_rate(params);
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int channels = params_channels(params);
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int slots = rd->mcasp->tdm_slots;
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int i, count = 0;
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snd_mask_none(&nfmt);
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if (channels > rd->mcasp->tdm_slots)
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channels = rd->mcasp->tdm_slots;
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for (i = 0; i < SNDRV_PCM_FORMAT_LAST; i++) {
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if (snd_mask_test(fmt, i)) {
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uint bclk_freq = snd_pcm_format_width(i)*channels*rate;
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uint bclk_freq = snd_pcm_format_width(i)*slots*rate;
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int ppm;
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davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm);
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@@ -1079,51 +1079,12 @@ static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params,
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}
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}
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dev_dbg(rd->mcasp->dev,
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"%d possible sample format for %d Hz and %d channels\n",
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count, rate, channels);
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"%d possible sample format for %d Hz and %d tdm slots\n",
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count, rate, slots);
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return snd_mask_refine(fmt, &nfmt);
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}
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static int davinci_mcasp_hw_rule_channels(struct snd_pcm_hw_params *params,
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struct snd_pcm_hw_rule *rule)
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{
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struct davinci_mcasp_ruledata *rd = rule->private;
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struct snd_interval *ci =
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hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
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int sbits = params_width(params);
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int rate = params_rate(params);
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int max_chan_per_wire = rd->mcasp->tdm_slots < ci->max ?
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rd->mcasp->tdm_slots : ci->max;
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unsigned int list[ci->max - ci->min + 1];
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int c1, c, count = 0;
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for (c1 = ci->min; c1 <= max_chan_per_wire; c1++) {
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uint bclk_freq = c1*sbits*rate;
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int ppm;
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davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm);
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if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
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/* If we can use all tdm_slots, we can put any
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amount of channels to remaining wires as
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long as they fit in. */
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if (c1 == rd->mcasp->tdm_slots) {
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for (c = c1; c <= rd->serializers*c1 &&
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c <= ci->max; c++)
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list[count++] = c;
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} else {
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list[count++] = c1;
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}
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}
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}
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dev_dbg(rd->mcasp->dev,
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"%d possible channel counts (%d-%d) for %d Hz and %d sbits\n",
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count, ci->min, ci->max, rate, sbits);
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return snd_interval_list(hw_param_interval(params, rule->var),
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count, list, 0);
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}
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static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *cpu_dai)
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{
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@@ -1167,6 +1128,11 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
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SNDRV_PCM_HW_PARAM_CHANNELS,
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2, max_channels);
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if (mcasp->chconstr[substream->stream].count)
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snd_pcm_hw_constraint_list(substream->runtime,
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0, SNDRV_PCM_HW_PARAM_CHANNELS,
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&mcasp->chconstr[substream->stream]);
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/*
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* If we rely on implicit BCLK divider setting we should
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* set constraints based on what we can provide.
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@@ -1180,24 +1146,14 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
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SNDRV_PCM_HW_PARAM_RATE,
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davinci_mcasp_hw_rule_rate,
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ruledata,
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SNDRV_PCM_HW_PARAM_FORMAT,
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SNDRV_PCM_HW_PARAM_CHANNELS, -1);
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SNDRV_PCM_HW_PARAM_FORMAT, -1);
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if (ret)
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return ret;
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ret = snd_pcm_hw_rule_add(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_FORMAT,
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davinci_mcasp_hw_rule_format,
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ruledata,
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SNDRV_PCM_HW_PARAM_RATE,
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SNDRV_PCM_HW_PARAM_CHANNELS, -1);
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if (ret)
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return ret;
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ret = snd_pcm_hw_rule_add(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_CHANNELS,
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davinci_mcasp_hw_rule_channels,
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ruledata,
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SNDRV_PCM_HW_PARAM_RATE,
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SNDRV_PCM_HW_PARAM_FORMAT, -1);
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SNDRV_PCM_HW_PARAM_RATE, -1);
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if (ret)
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return ret;
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}
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@@ -1556,6 +1512,59 @@ nodata:
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return pdata;
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}
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/* All serializers must have equal number of channels */
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static int davinci_mcasp_ch_constraint(struct davinci_mcasp *mcasp,
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struct snd_pcm_hw_constraint_list *cl,
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int serializers)
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{
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unsigned int *list;
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int i, count = 0;
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if (serializers <= 1)
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return 0;
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list = devm_kzalloc(mcasp->dev, sizeof(unsigned int) *
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(mcasp->tdm_slots + serializers - 2),
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GFP_KERNEL);
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if (!list)
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return -ENOMEM;
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for (i = 2; i <= mcasp->tdm_slots; i++)
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list[count++] = i;
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for (i = 2; i <= serializers; i++)
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list[count++] = i*mcasp->tdm_slots;
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cl->count = count;
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cl->list = list;
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return 0;
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}
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static int davinci_mcasp_init_ch_constraints(struct davinci_mcasp *mcasp)
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{
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int rx_serializers = 0, tx_serializers = 0, ret, i;
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for (i = 0; i < mcasp->num_serializer; i++)
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if (mcasp->serial_dir[i] == TX_MODE)
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tx_serializers++;
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else if (mcasp->serial_dir[i] == RX_MODE)
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rx_serializers++;
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ret = davinci_mcasp_ch_constraint(mcasp, &mcasp->chconstr[
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SNDRV_PCM_STREAM_PLAYBACK],
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tx_serializers);
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if (ret)
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return ret;
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ret = davinci_mcasp_ch_constraint(mcasp, &mcasp->chconstr[
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SNDRV_PCM_STREAM_CAPTURE],
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rx_serializers);
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return ret;
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}
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static int davinci_mcasp_probe(struct platform_device *pdev)
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{
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struct snd_dmaengine_dai_dma_data *dma_data;
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@@ -1739,6 +1748,10 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
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mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE;
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}
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ret = davinci_mcasp_init_ch_constraints(mcasp);
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if (ret)
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goto err;
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dev_set_drvdata(&pdev->dev, mcasp);
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mcasp_reparent_fck(pdev);
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