Merge tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
i.MX SoC update for 4.18: - A series from Bartosz to convert all i.MX plaform code using at24_platform_data to use at24 eeprom generic device properties. - Enable pinctrl driver support for i.MX6SLL SoC. - Clean up i.MX platform code using spi_imx platform data on outdated documentation and chip select array usage. * tag 'imx-soc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx: select imx6sll pinctrl when imx6sll enabled ARM: imx: pcm037: use device properties for at24 eeprom ARM: imx: pca100: use device properties for at24 eeprom ARM: imx: pcm043: use device properties for at24 eeprom ARM: imx: vpr200: drop at24_platform_data ARM: imx: Update spi_imx platform data to reflect current state Signed-off-by: Olof Johansson <olof@lixom.net>
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@@ -5,24 +5,29 @@
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/*
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* struct spi_imx_master - device.platform_data for SPI controller devices.
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* @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio
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* pins, numbers < 0 mean internal CSPI chipselects according
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* to MXC_SPI_CS(). Normally you want to use gpio based chip
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* selects as the CSPI module tries to be intelligent about
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* when to assert the chipselect: The CSPI module deasserts the
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* chipselect once it runs out of input data. The other problem
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* is that it is not possible to mix between high active and low
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* active chipselects on one single bus using the internal
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* chipselects. Unfortunately Freescale decided to put some
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* @chipselect: Array of chipselects for this master or NULL. Numbers >= 0
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* mean GPIO pins, -ENOENT means internal CSPI chipselect
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* matching the position in the array. E.g., if chipselect[1] =
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* -ENOENT then a SPI slave using chip select 1 will use the
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* native SS1 line of the CSPI. Omitting the array will use
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* all native chip selects.
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* Normally you want to use gpio based chip selects as the CSPI
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* module tries to be intelligent about when to assert the
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* chipselect: The CSPI module deasserts the chipselect once it
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* runs out of input data. The other problem is that it is not
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* possible to mix between high active and low active chipselects
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* on one single bus using the internal chipselects.
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* Unfortunately, on some SoCs, Freescale decided to put some
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* chipselects on dedicated pins which are not usable as gpios,
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* so we have to support the internal chipselects.
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* @num_chipselect: ARRAY_SIZE(chipselect)
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*
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* @num_chipselect: If @chipselect is specified, ARRAY_SIZE(chipselect),
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* otherwise the number of native chip selects.
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*/
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struct spi_imx_master {
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int *chipselect;
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int num_chipselect;
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};
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#define MXC_SPI_CS(no) ((no) - 32)
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#endif /* __MACH_SPI_H_*/
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