Merge tag 'tty-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial driver updates from Greg KH:
 "Here's the big tty/serial driver patchset for 3.18-rc1.

  Lots of little things in here, some good work from Peter Hurley on the
  tty core, and in lots of drivers.  There are also lots of other driver
  updates in here as well, full details in the changelogs.

  All have been in the linux-next tree for a while"

* tag 'tty-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (99 commits)
  Revert "serial/core: Initialize the console pm state"
  tty: serial: 8250: use 32bit variable for rpm_tx_active
  tty: serial: msm: Add earlycon support
  serial/core: Initialize the console pm state
  serial: asc: Conditionally use readl_relaxed (COMPILE_TEST)
  serial: of-serial: add PM suspend/resume support
  m68k: AMIGA_BUILTIN_SERIAL should depend on TTY
  asm/uapi: Add definition of TIOC[SG]RS485
  tty/metag_da: Add console_poll module parameter
  serial: 8250_pci: remove rts_n override from Baytrail quirk
  serial: cadence: Add generic earlycon support
  serial: imx: change the wait even to interruptiable
  serial: imx: terminate the RX DMA when the UART is suspending
  serial: imx: fix throttle/unthrottle callbacks for hardware assisted flow control
  serial: 8250: Add Quark X1000 to 8250_pci.c
  tty: omap-serial: pull out calculation from baud_is_mode16
  tty: omap-serial: fix division by zero
  xen_hvc: no reason to write the type key on xenstore
  tty: serial: 8250_core: remove UART_IER_RDI in serial8250_stop_rx()
  tty: serial: 8250_core: use the ->line argument as a hint in serial8250_find_match_or_unused()
  ...

Documentation/devicetree/bindings/serial/cirrus,clps711x-uart.txt

@@ -8,7 +8,8 @@ Required properties:
 - syscon: Phandle to SYSCON node, which contain UART control bits.
 
 Optional properties:
-- uart-use-ms: Indicate the UART has modem signal (DCD, DSR, CTS).
+- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
+  line respectively.
 
 Note: Each UART port should have an alias correctly numbered
 in "aliases" node.
@@ -24,5 +25,7 @@ Example:
 		interrupts = <12 13>;
 		clocks = <&clks 11>;
 		syscon = <&syscon1>;
-		uart-use-ms;
+		cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
+		dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
+		dcd-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
 	};

Documentation/devicetree/bindings/serial/mtk-uart.txt

@@ -0,0 +1,22 @@
+* Mediatek Universal Asynchronous Receiver/Transmitter (UART)
+
+Required properties:
+- compatible should contain:
+  * "mediatek,mt6589-uart" for MT6589 compatible UARTS
+  * "mediatek,mt6582-uart" for MT6582 compatible UARTS
+  * "mediatek,mt6577-uart" for all compatible UARTS (MT6589, MT6582, MT6577)
+
+- reg: The base address of the UART register bank.
+
+- interrupts: A single interrupt specifier.
+
+- clocks: Clock driving the hardware.
+
+Example:
+
+	uart0: serial@11006000 {
+		compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
+		reg = <0x11006000 0x400>;
+		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&uart_clk>;
+	};

Documentation/devicetree/bindings/serial/of-serial.txt

@@ -14,6 +14,7 @@ Required properties:
 	- "altr,16550-FIFO32"
 	- "altr,16550-FIFO64"
 	- "altr,16550-FIFO128"
+	- "fsl,16550-FIFO64"
 	- "serial" if the port type is unknown.
 - reg : offset and length of the register set for the device.
 - interrupts : should contain uart interrupt.
@@ -37,7 +38,6 @@ Optional properties:
 - auto-flow-control: one way to enable automatic flow control support. The
   driver is allowed to detect support for the capability even without this
   property.
-- has-hw-flow-control: the hardware has flow control capability.
 
 Example:
 

Documentation/devicetree/bindings/serial/via,vt8500-uart.txt

@@ -1,17 +0,0 @@
-VIA/Wondermedia VT8500 UART Controller
------------------------------------------------------
-
-Required properties:
-- compatible : "via,vt8500-uart"
-- reg : Should contain 1 register ranges(address and length)
-- interrupts : UART interrupt
-- clocks : phandle to the uart source clock (usually a 24Mhz fixed clock)
-
-Example:
-
-	uart@d8210000 {
-		compatible = "via,vt8500-uart";
-		reg = <0xd8210000 0x1040>;
-		interrupts = <47>;
-		clocks = <&ref24>;
-	};

Documentation/devicetree/bindings/serial/vt8500-uart.txt

@@ -1,7 +1,8 @@
 * VIA VT8500 and WonderMedia WM8xxx UART Controller
 
 Required properties:
-- compatible: should be "via,vt8500-uart"
+- compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and
+	including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later)
 
 - reg: base physical address of the controller and length of memory mapped
 	region.