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MIPS: ath79: export switch MDIO reference clock

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On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz
clock. If that feature is not used, it defaults to the main reference
clock, like on all other SoC.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
This commit is contained in:
Felix Fietkau
2019-01-11 15:22:35 +01:00
committed by Paul Burton
parent e7eea04d50
commit 6810ed320e
2 changed files with 10 additions and 1 deletions
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3
include/dt-bindings/clock/ath79-clk.h
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@@ -14,7 +14,8 @@
#define ATH79_CLK_DDR 1
#define ATH79_CLK_AHB 2
#define ATH79_CLK_REF 3
#define ATH79_CLK_MDIO 4
#define ATH79_CLK_END 4
#define ATH79_CLK_END 5
#endif /* __DT_BINDINGS_ATH79_CLK_H */