Merge tag 'tilcdc-4.9-3.1' of https://github.com/jsarha/linux into drm-next
Second attempt for 3rd drm/tilcdc pull request for v4.9. * tag 'tilcdc-4.9-3.1' of https://github.com/jsarha/linux: drm/tilcdc: fix wrong error handling drm/tilcdc: Return directly after a failed kfree_table_init() in tilcdc_convert_slave_node() drm/tilcdc: Remove "default" from blue-and-red-wiring property binding drm/tilcdc: Fix non static symbol warning drm/tilcdc: mark symbols static where possible drm/tilcdc: add missing header dependencies drm/tilcdc: WARN if CRTC is touched without CRTC lock drm/tilcdc: Take CRTC lock when calling tilcdc_crtc_disable() drm/tilcdc: Remove unnecessary tilcdc_crtc_disable() from tilcdc_unload() drm/tilcdc: Flush flip-work workqueue before drm_flip_work_cleanup() drm/tilcdc: Clean up LCDC functional clock rate setting code drm/tilcdc: Take crtc modeset lock while updating the crtc clock rate
Этот коммит содержится в:
@@ -20,6 +20,7 @@
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#include <drm/drm_crtc.h>
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#include <drm/drm_flip_work.h>
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#include <drm/drm_plane_helper.h>
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#include <linux/workqueue.h>
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#include "tilcdc_drv.h"
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#include "tilcdc_regs.h"
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@@ -37,6 +38,8 @@ struct tilcdc_crtc {
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bool frame_done;
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spinlock_t irq_lock;
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unsigned int lcd_fck_rate;
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ktime_t last_vblank;
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struct drm_framebuffer *curr_fb;
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@@ -152,6 +155,8 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc)
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struct drm_device *dev = crtc->dev;
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struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
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WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
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if (tilcdc_crtc->enabled)
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return;
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@@ -176,6 +181,8 @@ void tilcdc_crtc_disable(struct drm_crtc *crtc)
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struct drm_device *dev = crtc->dev;
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struct tilcdc_drm_private *priv = dev->dev_private;
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WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
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if (!tilcdc_crtc->enabled)
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return;
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@@ -227,8 +234,13 @@ static bool tilcdc_crtc_is_on(struct drm_crtc *crtc)
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static void tilcdc_crtc_destroy(struct drm_crtc *crtc)
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{
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struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
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struct tilcdc_drm_private *priv = crtc->dev->dev_private;
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drm_modeset_lock_crtc(crtc, NULL);
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tilcdc_crtc_disable(crtc);
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drm_modeset_unlock_crtc(crtc);
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flush_workqueue(priv->wq);
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of_node_put(crtc->port);
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drm_crtc_cleanup(crtc);
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@@ -243,6 +255,8 @@ int tilcdc_crtc_update_fb(struct drm_crtc *crtc,
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struct drm_device *dev = crtc->dev;
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unsigned long flags;
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WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
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if (tilcdc_crtc->event) {
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dev_err(dev->dev, "already pending page flip!\n");
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return -EBUSY;
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@@ -306,6 +320,37 @@ static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc,
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return true;
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}
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static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct tilcdc_drm_private *priv = dev->dev_private;
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struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
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const unsigned clkdiv = 2; /* using a fixed divider of 2 */
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int ret;
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/* mode.clock is in KHz, set_rate wants parameter in Hz */
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ret = clk_set_rate(priv->clk, crtc->mode.clock * 1000 * clkdiv);
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if (ret < 0) {
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dev_err(dev->dev, "failed to set display clock rate to: %d\n",
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crtc->mode.clock);
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return;
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}
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tilcdc_crtc->lcd_fck_rate = clk_get_rate(priv->clk);
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DBG("lcd_clk=%u, mode clock=%d, div=%u",
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tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv);
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/* Configure the LCD clock divisor. */
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tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) |
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LCDC_RASTER_MODE);
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if (priv->rev == 2)
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tilcdc_set(dev, LCDC_CLK_ENABLE_REG,
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LCDC_V2_DMA_CLK_EN | LCDC_V2_LIDD_CLK_EN |
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LCDC_V2_CORE_CLK_EN);
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}
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static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
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{
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struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
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@@ -316,6 +361,8 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
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struct drm_display_mode *mode = &crtc->state->adjusted_mode;
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struct drm_framebuffer *fb = crtc->primary->state->fb;
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WARN_ON(!drm_modeset_is_locked(&crtc->mutex));
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if (WARN_ON(!info))
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return;
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@@ -468,7 +515,7 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
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set_scanout(crtc, fb);
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tilcdc_crtc_update_clk(crtc);
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tilcdc_crtc_set_clk(crtc);
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crtc->hwmode = crtc->state->adjusted_mode;
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}
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@@ -637,41 +684,21 @@ void tilcdc_crtc_update_clk(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct tilcdc_drm_private *priv = dev->dev_private;
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unsigned long lcd_clk;
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const unsigned clkdiv = 2; /* using a fixed divider of 2 */
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int ret;
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struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
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pm_runtime_get_sync(dev->dev);
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drm_modeset_lock_crtc(crtc, NULL);
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if (tilcdc_crtc->lcd_fck_rate != clk_get_rate(priv->clk)) {
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if (tilcdc_crtc_is_on(crtc)) {
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pm_runtime_get_sync(dev->dev);
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tilcdc_crtc_disable(crtc);
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tilcdc_crtc_disable(crtc);
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tilcdc_crtc_set_clk(crtc);
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/* mode.clock is in KHz, set_rate wants parameter in Hz */
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ret = clk_set_rate(priv->clk, crtc->mode.clock * 1000 * clkdiv);
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if (ret < 0) {
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dev_err(dev->dev, "failed to set display clock rate to: %d\n",
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crtc->mode.clock);
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goto out;
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tilcdc_crtc_enable(crtc);
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pm_runtime_put_sync(dev->dev);
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}
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}
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lcd_clk = clk_get_rate(priv->clk);
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DBG("lcd_clk=%lu, mode clock=%d, div=%u",
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lcd_clk, crtc->mode.clock, clkdiv);
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/* Configure the LCD clock divisor. */
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tilcdc_write(dev, LCDC_CTRL_REG, LCDC_CLK_DIVISOR(clkdiv) |
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LCDC_RASTER_MODE);
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if (priv->rev == 2)
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tilcdc_set(dev, LCDC_CLK_ENABLE_REG,
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LCDC_V2_DMA_CLK_EN | LCDC_V2_LIDD_CLK_EN |
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LCDC_V2_CORE_CLK_EN);
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if (tilcdc_crtc_is_on(crtc))
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tilcdc_crtc_enable(crtc);
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out:
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pm_runtime_put_sync(dev->dev);
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drm_modeset_unlock_crtc(crtc);
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}
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#define SYNC_LOST_COUNT_LIMIT 50
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