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ath9k: Initialize pll_pwrsave for AR9462/AR9565

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Cards based on AR9462/AR9565 support more PCIE
power save mechanisms, so register them correctly.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Sujith Manoharan
2015-03-09 14:20:08 +05:30
committed by Kalle Valo
parent afa7e6dbd9
commit 656cd75c38
3 changed files with 5 additions and 1 deletions
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drivers/net/wireless/ath/ath9k/init.c
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@@ -440,6 +440,7 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc)
/*
* The default value of pll_pwrsave is 1.
* For certain AR9485 cards, it is set to 0.
* For AR9462, AR9565 it's set to 7.
*/
ah->config.pll_pwrsave = 1;