Merge linux-2.6 with linux-acpi-2.6
Este cometimento está contido em:
@@ -19,7 +19,7 @@ int unmap_page_from_agp(struct page *page);
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/* Could use CLFLUSH here if the cpu supports it. But then it would
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need to be called for each cacheline of the whole page so it may not be
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worth it. Would need a page for it. */
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#define flush_agp_cache() asm volatile("wbinvd":::"memory")
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#define flush_agp_cache() wbinvd()
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/* Convert a physical address to an address suitable for the GART. */
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#define phys_to_gart(x) (x)
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@@ -16,6 +16,7 @@
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#define GET_APIC_VERSION(x) ((x)&0xFF)
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#define GET_APIC_MAXLVT(x) (((x)>>16)&0xFF)
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#define APIC_INTEGRATED(x) ((x)&0xF0)
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#define APIC_XAPIC(x) ((x) >= 0x14)
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#define APIC_TASKPRI 0x80
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#define APIC_TPRI_MASK 0xFF
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#define APIC_ARBPRI 0x90
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11
include/asm-i386/auxvec.h
Ficheiro normal
11
include/asm-i386/auxvec.h
Ficheiro normal
@@ -0,0 +1,11 @@
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#ifndef __ASMi386_AUXVEC_H
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#define __ASMi386_AUXVEC_H
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/*
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* Architecture-neutral AT_ values in 0-17, leave some room
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* for more of them, start the x86-specific ones at 32.
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*/
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#define AT_SYSINFO 32
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#define AT_SYSINFO_EHDR 33
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#endif
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@@ -118,7 +118,10 @@ static void __init check_hlt(void)
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printk("disabled\n");
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return;
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}
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__asm__ __volatile__("hlt ; hlt ; hlt ; hlt");
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halt();
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halt();
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halt();
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halt();
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printk("OK.\n");
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}
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@@ -27,8 +27,18 @@ struct Xgt_desc_struct {
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extern struct Xgt_desc_struct idt_descr, cpu_gdt_descr[NR_CPUS];
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#define load_TR_desc() __asm__ __volatile__("ltr %%ax"::"a" (GDT_ENTRY_TSS*8))
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#define load_LDT_desc() __asm__ __volatile__("lldt %%ax"::"a" (GDT_ENTRY_LDT*8))
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#define load_TR_desc() __asm__ __volatile__("ltr %w0"::"q" (GDT_ENTRY_TSS*8))
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#define load_LDT_desc() __asm__ __volatile__("lldt %w0"::"q" (GDT_ENTRY_LDT*8))
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#define load_gdt(dtr) __asm__ __volatile("lgdt %0"::"m" (*dtr))
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#define load_idt(dtr) __asm__ __volatile("lidt %0"::"m" (*dtr))
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#define load_tr(tr) __asm__ __volatile("ltr %0"::"mr" (tr))
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#define load_ldt(ldt) __asm__ __volatile("lldt %0"::"mr" (ldt))
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#define store_gdt(dtr) __asm__ ("sgdt %0":"=m" (*dtr))
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#define store_idt(dtr) __asm__ ("sidt %0":"=m" (*dtr))
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#define store_tr(tr) __asm__ ("str %0":"=mr" (tr))
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#define store_ldt(ldt) __asm__ ("sldt %0":"=mr" (ldt))
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/*
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* This is the ldt that every process will get unless we need
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@@ -39,14 +49,14 @@ extern void set_intr_gate(unsigned int irq, void * addr);
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#define _set_tssldt_desc(n,addr,limit,type) \
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__asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
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"movw %%ax,2(%2)\n\t" \
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"rorl $16,%%eax\n\t" \
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"movb %%al,4(%2)\n\t" \
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"movw %w1,2(%2)\n\t" \
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"rorl $16,%1\n\t" \
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"movb %b1,4(%2)\n\t" \
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"movb %4,5(%2)\n\t" \
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"movb $0,6(%2)\n\t" \
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"movb %%ah,7(%2)\n\t" \
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"rorl $16,%%eax" \
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: "=m"(*(n)) : "a" (addr), "r"(n), "ir"(limit), "i"(type))
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"movb %h1,7(%2)\n\t" \
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"rorl $16,%1" \
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: "=m"(*(n)) : "q" (addr), "r"(n), "ir"(limit), "i"(type))
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static inline void __set_tss_desc(unsigned int cpu, unsigned int entry, void *addr)
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{
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@@ -86,6 +96,13 @@ static inline void set_ldt_desc(unsigned int cpu, void *addr, unsigned int size)
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(info)->seg_not_present == 1 && \
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(info)->useable == 0 )
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static inline void write_ldt_entry(void *ldt, int entry, __u32 entry_a, __u32 entry_b)
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{
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__u32 *lp = (__u32 *)((char *)ldt + entry*8);
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*lp = entry_a;
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*(lp+1) = entry_b;
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}
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#if TLS_SIZE != 24
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# error update this code.
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#endif
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@@ -9,6 +9,7 @@
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#include <asm/user.h>
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#include <asm/processor.h>
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#include <asm/system.h> /* for savesegment */
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#include <asm/auxvec.h>
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#include <linux/utsname.h>
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@@ -109,13 +110,6 @@ typedef struct user_fxsr_struct elf_fpxregset_t;
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#define ELF_PLATFORM (system_utsname.machine)
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/*
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* Architecture-neutral AT_ values in 0-17, leave some room
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* for more of them, start the x86-specific ones at 32.
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*/
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#define AT_SYSINFO 32
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#define AT_SYSINFO_EHDR 33
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#ifdef __KERNEL__
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#define SET_PERSONALITY(ex, ibcs2) do { } while (0)
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@@ -1,88 +1 @@
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#ifndef _I386_FCNTL_H
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#define _I386_FCNTL_H
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/* open/fcntl - O_SYNC is only implemented on blocks devices and on files
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located on an ext2 file system */
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#define O_ACCMODE 0003
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#define O_RDONLY 00
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#define O_WRONLY 01
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#define O_RDWR 02
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#define O_CREAT 0100 /* not fcntl */
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#define O_EXCL 0200 /* not fcntl */
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#define O_NOCTTY 0400 /* not fcntl */
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#define O_TRUNC 01000 /* not fcntl */
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#define O_APPEND 02000
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#define O_NONBLOCK 04000
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#define O_NDELAY O_NONBLOCK
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#define O_SYNC 010000
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#define FASYNC 020000 /* fcntl, for BSD compatibility */
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#define O_DIRECT 040000 /* direct disk access hint */
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#define O_LARGEFILE 0100000
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#define O_DIRECTORY 0200000 /* must be a directory */
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#define O_NOFOLLOW 0400000 /* don't follow links */
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#define O_NOATIME 01000000
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#define F_DUPFD 0 /* dup */
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#define F_GETFD 1 /* get close_on_exec */
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#define F_SETFD 2 /* set/clear close_on_exec */
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#define F_GETFL 3 /* get file->f_flags */
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#define F_SETFL 4 /* set file->f_flags */
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#define F_GETLK 5
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#define F_SETLK 6
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#define F_SETLKW 7
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#define F_SETOWN 8 /* for sockets. */
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#define F_GETOWN 9 /* for sockets. */
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#define F_SETSIG 10 /* for sockets. */
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#define F_GETSIG 11 /* for sockets. */
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#define F_GETLK64 12 /* using 'struct flock64' */
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#define F_SETLK64 13
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#define F_SETLKW64 14
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/* for F_[GET|SET]FL */
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#define FD_CLOEXEC 1 /* actually anything with low bit set goes */
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/* for posix fcntl() and lockf() */
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#define F_RDLCK 0
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#define F_WRLCK 1
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#define F_UNLCK 2
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/* for old implementation of bsd flock () */
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#define F_EXLCK 4 /* or 3 */
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#define F_SHLCK 8 /* or 4 */
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/* for leases */
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#define F_INPROGRESS 16
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/* operations for bsd flock(), also used by the kernel implementation */
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#define LOCK_SH 1 /* shared lock */
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#define LOCK_EX 2 /* exclusive lock */
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#define LOCK_NB 4 /* or'd with one of the above to prevent
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blocking */
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#define LOCK_UN 8 /* remove lock */
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#define LOCK_MAND 32 /* This is a mandatory flock */
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#define LOCK_READ 64 /* ... Which allows concurrent read operations */
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#define LOCK_WRITE 128 /* ... Which allows concurrent write operations */
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#define LOCK_RW 192 /* ... Which allows concurrent read & write ops */
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struct flock {
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short l_type;
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short l_whence;
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off_t l_start;
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off_t l_len;
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pid_t l_pid;
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};
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struct flock64 {
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short l_type;
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short l_whence;
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loff_t l_start;
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loff_t l_len;
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pid_t l_pid;
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};
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#define F_LINUX_SPECIFIC_BASE 1024
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#endif
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#include <asm-generic/fcntl.h>
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108
include/asm-i386/futex.h
Ficheiro normal
108
include/asm-i386/futex.h
Ficheiro normal
@@ -0,0 +1,108 @@
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#ifndef _ASM_FUTEX_H
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#define _ASM_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <asm/errno.h>
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#include <asm/system.h>
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#include <asm/processor.h>
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#include <asm/uaccess.h>
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#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
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__asm__ __volatile ( \
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"1: " insn "\n" \
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"2: .section .fixup,\"ax\"\n\
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3: mov %3, %1\n\
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jmp 2b\n\
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.previous\n\
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.section __ex_table,\"a\"\n\
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.align 8\n\
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.long 1b,3b\n\
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.previous" \
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: "=r" (oldval), "=r" (ret), "=m" (*uaddr) \
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: "i" (-EFAULT), "m" (*uaddr), "0" (oparg), "1" (0))
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#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
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__asm__ __volatile ( \
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"1: movl %2, %0\n\
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movl %0, %3\n" \
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insn "\n" \
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"2: " LOCK_PREFIX "cmpxchgl %3, %2\n\
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jnz 1b\n\
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3: .section .fixup,\"ax\"\n\
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4: mov %5, %1\n\
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jmp 3b\n\
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.previous\n\
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.section __ex_table,\"a\"\n\
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.align 8\n\
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.long 1b,4b,2b,4b\n\
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.previous" \
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: "=&a" (oldval), "=&r" (ret), "=m" (*uaddr), \
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"=&r" (tem) \
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: "r" (oparg), "i" (-EFAULT), "m" (*uaddr), "1" (0))
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static inline int
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futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret, tem;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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inc_preempt_count();
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if (op == FUTEX_OP_SET)
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__futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
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else {
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#ifndef CONFIG_X86_BSWAP
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if (boot_cpu_data.x86 == 3)
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ret = -ENOSYS;
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else
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#endif
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switch (op) {
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case FUTEX_OP_ADD:
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__futex_atomic_op1(LOCK_PREFIX "xaddl %0, %2", ret,
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oldval, uaddr, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op2("orl %4, %3", ret, oldval, uaddr,
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oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op2("andl %4, %3", ret, oldval, uaddr,
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~oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op2("xorl %4, %3", ret, oldval, uaddr,
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oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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}
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dec_preempt_count();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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#endif
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#endif
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@@ -1 +0,0 @@
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#warning this file is obsolete, please do not use it
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@@ -41,9 +41,16 @@ enum die_val {
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DIE_PAGE_FAULT,
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};
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static inline int notify_die(enum die_val val,char *str,struct pt_regs *regs,long err,int trap, int sig)
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static inline int notify_die(enum die_val val, const char *str,
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struct pt_regs *regs, long err, int trap, int sig)
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{
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struct die_args args = { .regs=regs, .str=str, .err=err, .trapnr=trap,.signr=sig };
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struct die_args args = {
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.regs = regs,
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.str = str,
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.err = err,
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.trapnr = trap,
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.signr = sig
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};
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return notifier_call_chain(&i386die_chain, val, &args);
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}
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|
@@ -1,6 +1,8 @@
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#ifndef __ASM_MACH_MPPARSE_H
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#define __ASM_MACH_MPPARSE_H
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#include <linux/acpi.h>
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static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name,
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struct mpc_config_translation *translation)
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{
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@@ -12,8 +14,9 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m,
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{
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}
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extern int parse_unisys_oem (char *oemptr, int oem_entries);
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extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length);
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extern int parse_unisys_oem (char *oemptr);
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extern int find_unisys_acpi_oem_table(unsigned long *oem_addr);
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extern void setup_unisys();
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static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
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char *productid)
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@@ -22,18 +25,33 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
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struct mp_config_oemtable *oem_table =
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(struct mp_config_oemtable *)mpc->mpc_oemptr;
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if (!strncmp(oem, "UNISYS", 6))
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return parse_unisys_oem((char *)oem_table, oem_table->oem_length);
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return parse_unisys_oem((char *)oem_table);
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}
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return 0;
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}
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static inline int es7000_check_dsdt()
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{
|
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struct acpi_table_header *header = NULL;
|
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if(!acpi_get_table_header_early(ACPI_DSDT, &header))
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acpi_table_print(header, 0);
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if (!strncmp(header->oem_id, "UNISYS", 6))
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return 1;
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return 0;
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}
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/* Hook from generic ACPI tables.c */
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static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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{
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unsigned long oem_addr;
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int oem_entries;
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if (!find_unisys_acpi_oem_table(&oem_addr, &oem_entries))
|
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return parse_unisys_oem((char *)oem_addr, oem_entries);
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if (!find_unisys_acpi_oem_table(&oem_addr)) {
|
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if (es7000_check_dsdt())
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return parse_unisys_oem((char *)oem_addr);
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else {
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setup_unisys();
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return 1;
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}
|
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}
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return 0;
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}
|
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|
@@ -28,4 +28,6 @@
|
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#define enable_apic_mode (genapic->enable_apic_mode)
|
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#define phys_pkg_id (genapic->phys_pkg_id)
|
||||
|
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extern void generic_bigsmp_probe(void);
|
||||
|
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#endif /* __ASM_MACH_APIC_H */
|
||||
|
@@ -11,6 +11,7 @@ extern int mp_bus_id_to_local [MAX_MP_BUSSES];
|
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extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
|
||||
extern int mp_bus_id_to_pci_bus [MAX_MP_BUSSES];
|
||||
|
||||
extern unsigned int def_to_bigsmp;
|
||||
extern unsigned int boot_cpu_physical_apicid;
|
||||
extern int smp_found_config;
|
||||
extern void find_smp_config (void);
|
||||
|
@@ -47,6 +47,21 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val)
|
||||
: "c" (msr), "0" (a), "d" (b), "i" (-EFAULT));\
|
||||
ret__; })
|
||||
|
||||
/* rdmsr with exception handling */
|
||||
#define rdmsr_safe(msr,a,b) ({ int ret__; \
|
||||
asm volatile("2: rdmsr ; xorl %0,%0\n" \
|
||||
"1:\n\t" \
|
||||
".section .fixup,\"ax\"\n\t" \
|
||||
"3: movl %4,%0 ; jmp 1b\n\t" \
|
||||
".previous\n\t" \
|
||||
".section __ex_table,\"a\"\n" \
|
||||
" .align 4\n\t" \
|
||||
" .long 2b,3b\n\t" \
|
||||
".previous" \
|
||||
: "=r" (ret__), "=a" (*(a)), "=d" (*(b)) \
|
||||
: "c" (msr), "i" (-EFAULT));\
|
||||
ret__; })
|
||||
|
||||
#define rdtsc(low,high) \
|
||||
__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
|
||||
|
||||
|
@@ -68,7 +68,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
|
||||
#define HPAGE_MASK (~(HPAGE_SIZE - 1))
|
||||
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
|
||||
#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
|
||||
#define ARCH_HAS_HUGETLB_CLEAN_STALE_PGTABLE
|
||||
#endif
|
||||
|
||||
#define pgd_val(x) ((x).pgd)
|
||||
@@ -104,20 +103,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
|
||||
*/
|
||||
extern unsigned int __VMALLOC_RESERVE;
|
||||
|
||||
/* Pure 2^n version of get_order */
|
||||
static __inline__ int get_order(unsigned long size)
|
||||
{
|
||||
int order;
|
||||
|
||||
size = (size-1) >> (PAGE_SHIFT-1);
|
||||
order = -1;
|
||||
do {
|
||||
size >>= 1;
|
||||
order++;
|
||||
} while (size);
|
||||
return order;
|
||||
}
|
||||
|
||||
extern int sysctl_legacy_va_layout;
|
||||
|
||||
extern int page_is_ram(unsigned long pagenr);
|
||||
@@ -156,4 +141,6 @@ extern int page_is_ram(unsigned long pagenr);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#include <asm-generic/page.h>
|
||||
|
||||
#endif /* _I386_PAGE_H */
|
||||
|
@@ -64,7 +64,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
|
||||
#define set_pmd(pmdptr,pmdval) \
|
||||
set_64bit((unsigned long long *)(pmdptr),pmd_val(pmdval))
|
||||
#define set_pud(pudptr,pudval) \
|
||||
set_64bit((unsigned long long *)(pudptr),pud_val(pudval))
|
||||
(*(pudptr) = (pudval))
|
||||
|
||||
/*
|
||||
* Pentium-II erratum A13: in PAE mode we explicitly have to flush
|
||||
|
@@ -86,9 +86,7 @@ void paging_init(void);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The 4MB page is guessing.. Detailed in the infamous "Chapter H"
|
||||
* of the Pentium details, but assuming intel did the straightforward
|
||||
* thing, this bit set in the page directory entry just means that
|
||||
* _PAGE_PSE set in the page directory entry just means that
|
||||
* the page directory entry points directly to a 4MB-aligned block of
|
||||
* memory.
|
||||
*/
|
||||
@@ -119,8 +117,10 @@ void paging_init(void);
|
||||
#define _PAGE_UNUSED2 0x400
|
||||
#define _PAGE_UNUSED3 0x800
|
||||
|
||||
#define _PAGE_FILE 0x040 /* set:pagecache unset:swap */
|
||||
#define _PAGE_PROTNONE 0x080 /* If not present */
|
||||
/* If _PAGE_PRESENT is clear, we use these: */
|
||||
#define _PAGE_FILE 0x040 /* nonlinear file mapping, saved PTE; unset:swap */
|
||||
#define _PAGE_PROTNONE 0x080 /* if the user mapped it with PROT_NONE;
|
||||
pte_present gives true */
|
||||
#ifdef CONFIG_X86_PAE
|
||||
#define _PAGE_NX (1ULL<<_PAGE_BIT_NX)
|
||||
#else
|
||||
@@ -215,11 +215,13 @@ extern unsigned long pg0[];
|
||||
* The following only work if pte_present() is true.
|
||||
* Undefined behaviour if not..
|
||||
*/
|
||||
#define __LARGE_PTE (_PAGE_PSE | _PAGE_PRESENT)
|
||||
static inline int pte_user(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
|
||||
static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_USER; }
|
||||
static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_DIRTY; }
|
||||
static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; }
|
||||
static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_RW; }
|
||||
static inline int pte_huge(pte_t pte) { return ((pte).pte_low & __LARGE_PTE) == __LARGE_PTE; }
|
||||
|
||||
/*
|
||||
* The following only works if pte_present() is not true.
|
||||
@@ -236,7 +238,7 @@ static inline pte_t pte_mkexec(pte_t pte) { (pte).pte_low |= _PAGE_USER; return
|
||||
static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte_low |= _PAGE_DIRTY; return pte; }
|
||||
static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte_low |= _PAGE_ACCESSED; return pte; }
|
||||
static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte_low |= _PAGE_RW; return pte; }
|
||||
static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= _PAGE_PRESENT | _PAGE_PSE; return pte; }
|
||||
static inline pte_t pte_mkhuge(pte_t pte) { (pte).pte_low |= __LARGE_PTE; return pte; }
|
||||
|
||||
#ifdef CONFIG_X86_PAE
|
||||
# include <asm/pgtable-3level.h>
|
||||
@@ -258,11 +260,38 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned
|
||||
return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte_low);
|
||||
}
|
||||
|
||||
static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, unsigned long addr, pte_t *ptep, int full)
|
||||
{
|
||||
pte_t pte;
|
||||
if (full) {
|
||||
pte = *ptep;
|
||||
*ptep = __pte(0);
|
||||
} else {
|
||||
pte = ptep_get_and_clear(mm, addr, ptep);
|
||||
}
|
||||
return pte;
|
||||
}
|
||||
|
||||
static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
|
||||
{
|
||||
clear_bit(_PAGE_BIT_RW, &ptep->pte_low);
|
||||
}
|
||||
|
||||
/*
|
||||
* clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
|
||||
*
|
||||
* dst - pointer to pgd range anwhere on a pgd page
|
||||
* src - ""
|
||||
* count - the number of pgds to copy.
|
||||
*
|
||||
* dst and src can be on the same page, but the range must not overlap,
|
||||
* and must not cross a page boundary.
|
||||
*/
|
||||
static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
|
||||
{
|
||||
memcpy(dst, src, count * sizeof(pgd_t));
|
||||
}
|
||||
|
||||
/*
|
||||
* Macro to mark a page protection value as "uncacheable". On processors which do not support
|
||||
* it, this is a no-op.
|
||||
@@ -415,6 +444,7 @@ extern void noexec_setup(const char *str);
|
||||
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
|
||||
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
|
||||
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
|
||||
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
|
||||
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
|
||||
#define __HAVE_ARCH_PTE_SAME
|
||||
#include <asm-generic/pgtable.h>
|
||||
|
@@ -203,9 +203,7 @@ static inline unsigned int cpuid_edx(unsigned int op)
|
||||
return edx;
|
||||
}
|
||||
|
||||
#define load_cr3(pgdir) \
|
||||
asm volatile("movl %0,%%cr3": :"r" (__pa(pgdir)))
|
||||
|
||||
#define load_cr3(pgdir) write_cr3(__pa(pgdir))
|
||||
|
||||
/*
|
||||
* Intel CPU features in CR4
|
||||
@@ -232,22 +230,20 @@ extern unsigned long mmu_cr4_features;
|
||||
|
||||
static inline void set_in_cr4 (unsigned long mask)
|
||||
{
|
||||
unsigned cr4;
|
||||
mmu_cr4_features |= mask;
|
||||
__asm__("movl %%cr4,%%eax\n\t"
|
||||
"orl %0,%%eax\n\t"
|
||||
"movl %%eax,%%cr4\n"
|
||||
: : "irg" (mask)
|
||||
:"ax");
|
||||
cr4 = read_cr4();
|
||||
cr4 |= mask;
|
||||
write_cr4(cr4);
|
||||
}
|
||||
|
||||
static inline void clear_in_cr4 (unsigned long mask)
|
||||
{
|
||||
unsigned cr4;
|
||||
mmu_cr4_features &= ~mask;
|
||||
__asm__("movl %%cr4,%%eax\n\t"
|
||||
"andl %0,%%eax\n\t"
|
||||
"movl %%eax,%%cr4\n"
|
||||
: : "irg" (~mask)
|
||||
:"ax");
|
||||
cr4 = read_cr4();
|
||||
cr4 &= ~mask;
|
||||
write_cr4(cr4);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -281,6 +277,11 @@ static inline void clear_in_cr4 (unsigned long mask)
|
||||
outb((data), 0x23); \
|
||||
} while (0)
|
||||
|
||||
static inline void serialize_cpu(void)
|
||||
{
|
||||
__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
|
||||
}
|
||||
|
||||
static inline void __monitor(const void *eax, unsigned long ecx,
|
||||
unsigned long edx)
|
||||
{
|
||||
@@ -454,6 +455,7 @@ struct thread_struct {
|
||||
unsigned int saved_fs, saved_gs;
|
||||
/* IO permissions */
|
||||
unsigned long *io_bitmap_ptr;
|
||||
unsigned long iopl;
|
||||
/* max allowed port in the bitmap, in bytes: */
|
||||
unsigned long io_bitmap_max;
|
||||
};
|
||||
@@ -474,7 +476,6 @@ struct thread_struct {
|
||||
.esp0 = sizeof(init_stack) + (long)&init_stack, \
|
||||
.ss0 = __KERNEL_DS, \
|
||||
.ss1 = __KERNEL_CS, \
|
||||
.ldt = GDT_ENTRY_LDT, \
|
||||
.io_bitmap_base = INVALID_IO_BITMAP_OFFSET, \
|
||||
.io_bitmap = { [ 0 ... IO_BITMAP_LONGS] = ~0 }, \
|
||||
}
|
||||
@@ -511,6 +512,21 @@ static inline void load_esp0(struct tss_struct *tss, struct thread_struct *threa
|
||||
: /* no output */ \
|
||||
:"r" (value))
|
||||
|
||||
/*
|
||||
* Set IOPL bits in EFLAGS from given mask
|
||||
*/
|
||||
static inline void set_iopl_mask(unsigned mask)
|
||||
{
|
||||
unsigned int reg;
|
||||
__asm__ __volatile__ ("pushfl;"
|
||||
"popl %0;"
|
||||
"andl %1, %0;"
|
||||
"orl %2, %0;"
|
||||
"pushl %0;"
|
||||
"popfl"
|
||||
: "=&r" (reg)
|
||||
: "i" (~X86_EFLAGS_IOPL), "r" (mask));
|
||||
}
|
||||
|
||||
/* Forward declaration, a strange C thing */
|
||||
struct task_struct;
|
||||
|
@@ -61,6 +61,13 @@ struct pt_regs {
|
||||
struct task_struct;
|
||||
extern void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs, int error_code);
|
||||
|
||||
/*
|
||||
* user_mode_vm(regs) determines whether a register set came from user mode.
|
||||
* This is true if V8086 mode was enabled OR if the register set was from
|
||||
* protected mode with RPL-3 CS value. This tricky test checks that with
|
||||
* one comparison. Many places in the kernel can bypass this full check
|
||||
* if they have already ruled out V8086 mode, so user_mode(regs) can be used.
|
||||
*/
|
||||
static inline int user_mode(struct pt_regs *regs)
|
||||
{
|
||||
return (regs->xcs & 3) != 0;
|
||||
|
@@ -44,7 +44,7 @@ extern unsigned char boot_params[PARAM_SIZE];
|
||||
#define EFI_SYSTAB ((efi_system_table_t *) *((unsigned long *)(PARAM+0x1c4)))
|
||||
#define EFI_MEMDESC_SIZE (*((unsigned long *) (PARAM+0x1c8)))
|
||||
#define EFI_MEMDESC_VERSION (*((unsigned long *) (PARAM+0x1cc)))
|
||||
#define EFI_MEMMAP ((efi_memory_desc_t *) *((unsigned long *)(PARAM+0x1d0)))
|
||||
#define EFI_MEMMAP ((void *) *((unsigned long *)(PARAM+0x1d0)))
|
||||
#define EFI_MEMMAP_SIZE (*((unsigned long *) (PARAM+0x1d4)))
|
||||
#define MOUNT_ROOT_RDONLY (*(unsigned short *) (PARAM+0x1F2))
|
||||
#define RAMDISK_FLAGS (*(unsigned short *) (PARAM+0x1F8))
|
||||
|
@@ -59,7 +59,7 @@ extern void cpu_uninit(void);
|
||||
|
||||
extern cpumask_t cpu_callout_map;
|
||||
extern cpumask_t cpu_callin_map;
|
||||
#define cpu_possible_map cpu_callout_map
|
||||
extern cpumask_t cpu_possible_map;
|
||||
|
||||
/* We don't mark CPUs online until __cpu_up(), so we need another measure */
|
||||
static inline int num_booting_cpus(void)
|
||||
|
@@ -14,8 +14,7 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc
|
||||
|
||||
#define switch_to(prev,next,last) do { \
|
||||
unsigned long esi,edi; \
|
||||
asm volatile("pushfl\n\t" \
|
||||
"pushl %%ebp\n\t" \
|
||||
asm volatile("pushl %%ebp\n\t" \
|
||||
"movl %%esp,%0\n\t" /* save ESP */ \
|
||||
"movl %5,%%esp\n\t" /* restore ESP */ \
|
||||
"movl $1f,%1\n\t" /* save EIP */ \
|
||||
@@ -23,7 +22,6 @@ extern struct task_struct * FASTCALL(__switch_to(struct task_struct *prev, struc
|
||||
"jmp __switch_to\n" \
|
||||
"1:\t" \
|
||||
"popl %%ebp\n\t" \
|
||||
"popfl" \
|
||||
:"=m" (prev->thread.esp),"=m" (prev->thread.eip), \
|
||||
"=a" (last),"=S" (esi),"=D" (edi) \
|
||||
:"m" (next->thread.esp),"m" (next->thread.eip), \
|
||||
@@ -93,13 +91,13 @@ static inline unsigned long _get_base(char * addr)
|
||||
".align 4\n\t" \
|
||||
".long 1b,3b\n" \
|
||||
".previous" \
|
||||
: :"m" (value))
|
||||
: :"rm" (value))
|
||||
|
||||
/*
|
||||
* Save a segment register away
|
||||
*/
|
||||
#define savesegment(seg, value) \
|
||||
asm volatile("mov %%" #seg ",%0":"=m" (value))
|
||||
asm volatile("mov %%" #seg ",%0":"=rm" (value))
|
||||
|
||||
/*
|
||||
* Clear and set 'TS' bit respectively
|
||||
@@ -107,13 +105,33 @@ static inline unsigned long _get_base(char * addr)
|
||||
#define clts() __asm__ __volatile__ ("clts")
|
||||
#define read_cr0() ({ \
|
||||
unsigned int __dummy; \
|
||||
__asm__( \
|
||||
__asm__ __volatile__( \
|
||||
"movl %%cr0,%0\n\t" \
|
||||
:"=r" (__dummy)); \
|
||||
__dummy; \
|
||||
})
|
||||
#define write_cr0(x) \
|
||||
__asm__("movl %0,%%cr0": :"r" (x));
|
||||
__asm__ __volatile__("movl %0,%%cr0": :"r" (x));
|
||||
|
||||
#define read_cr2() ({ \
|
||||
unsigned int __dummy; \
|
||||
__asm__ __volatile__( \
|
||||
"movl %%cr2,%0\n\t" \
|
||||
:"=r" (__dummy)); \
|
||||
__dummy; \
|
||||
})
|
||||
#define write_cr2(x) \
|
||||
__asm__ __volatile__("movl %0,%%cr2": :"r" (x));
|
||||
|
||||
#define read_cr3() ({ \
|
||||
unsigned int __dummy; \
|
||||
__asm__ ( \
|
||||
"movl %%cr3,%0\n\t" \
|
||||
:"=r" (__dummy)); \
|
||||
__dummy; \
|
||||
})
|
||||
#define write_cr3(x) \
|
||||
__asm__ __volatile__("movl %0,%%cr3": :"r" (x));
|
||||
|
||||
#define read_cr4() ({ \
|
||||
unsigned int __dummy; \
|
||||
@@ -123,7 +141,7 @@ static inline unsigned long _get_base(char * addr)
|
||||
__dummy; \
|
||||
})
|
||||
#define write_cr4(x) \
|
||||
__asm__("movl %0,%%cr4": :"r" (x));
|
||||
__asm__ __volatile__("movl %0,%%cr4": :"r" (x));
|
||||
#define stts() write_cr0(8 | read_cr0())
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
@@ -447,6 +465,8 @@ struct alt_instr {
|
||||
#define local_irq_enable() __asm__ __volatile__("sti": : :"memory")
|
||||
/* used in the idle loop; sti takes one instruction cycle to complete */
|
||||
#define safe_halt() __asm__ __volatile__("sti; hlt": : :"memory")
|
||||
/* used when interrupts are already enabled or to shutdown the processor */
|
||||
#define halt() __asm__ __volatile__("hlt": : :"memory")
|
||||
|
||||
#define irqs_disabled() \
|
||||
({ \
|
||||
|
@@ -139,6 +139,7 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
|
||||
#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
|
||||
#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */
|
||||
#define TIF_IRET 5 /* return with iret */
|
||||
#define TIF_SYSCALL_EMU 6 /* syscall emulation active */
|
||||
#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */
|
||||
#define TIF_SECCOMP 8 /* secure computing */
|
||||
#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */
|
||||
@@ -150,13 +151,15 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
|
||||
#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
|
||||
#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
|
||||
#define _TIF_IRET (1<<TIF_IRET)
|
||||
#define _TIF_SYSCALL_EMU (1<<TIF_SYSCALL_EMU)
|
||||
#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
|
||||
#define _TIF_SECCOMP (1<<TIF_SECCOMP)
|
||||
#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
|
||||
|
||||
/* work to do on interrupt/exception return */
|
||||
#define _TIF_WORK_MASK \
|
||||
(0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|_TIF_SECCOMP))
|
||||
(0x0000FFFF & ~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP|\
|
||||
_TIF_SECCOMP|_TIF_SYSCALL_EMU))
|
||||
/* work to do on any return to u-space */
|
||||
#define _TIF_ALLWORK_MASK (0x0000FFFF & ~_TIF_SECCOMP)
|
||||
|
||||
|
@@ -1,6 +1,7 @@
|
||||
#ifndef _ASMi386_TIMER_H
|
||||
#define _ASMi386_TIMER_H
|
||||
#include <linux/init.h>
|
||||
#include <linux/pm.h>
|
||||
|
||||
/**
|
||||
* struct timer_ops - used to define a timer source
|
||||
@@ -23,6 +24,8 @@ struct timer_opts {
|
||||
unsigned long long (*monotonic_clock)(void);
|
||||
void (*delay)(unsigned long);
|
||||
unsigned long (*read_timer)(void);
|
||||
int (*suspend)(pm_message_t state);
|
||||
int (*resume)(void);
|
||||
};
|
||||
|
||||
struct init_timer_opts {
|
||||
|
@@ -63,8 +63,6 @@ typedef u64 sector_t;
|
||||
#define HAVE_SECTOR_T
|
||||
#endif
|
||||
|
||||
typedef unsigned short kmem_bufctl_t;
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
@@ -83,30 +83,6 @@ extern struct movsl_mask {
|
||||
*/
|
||||
#define access_ok(type,addr,size) (likely(__range_ok(addr,size) == 0))
|
||||
|
||||
/**
|
||||
* verify_area: - Obsolete/deprecated and will go away soon,
|
||||
* use access_ok() instead.
|
||||
* @type: Type of access: %VERIFY_READ or %VERIFY_WRITE
|
||||
* @addr: User space pointer to start of block to check
|
||||
* @size: Size of block to check
|
||||
*
|
||||
* Context: User context only. This function may sleep.
|
||||
*
|
||||
* This function has been replaced by access_ok().
|
||||
*
|
||||
* Checks if a pointer to a block of memory in user space is valid.
|
||||
*
|
||||
* Returns zero if the memory block may be valid, -EFAULT
|
||||
* if it is definitely invalid.
|
||||
*
|
||||
* See access_ok() for more details.
|
||||
*/
|
||||
static inline int __deprecated verify_area(int type, const void __user * addr, unsigned long size)
|
||||
{
|
||||
return access_ok(type,addr,size) ? 0 : -EFAULT;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* The exception table consists of pairs of addresses: the first is the
|
||||
* address of an instruction that is allowed to fault, and the second is
|
||||
|
@@ -535,14 +535,14 @@ static struct xor_block_template xor_block_p5_mmx = {
|
||||
|
||||
#define XMMS_SAVE do { \
|
||||
preempt_disable(); \
|
||||
cr0 = read_cr0(); \
|
||||
clts(); \
|
||||
__asm__ __volatile__ ( \
|
||||
"movl %%cr0,%0 ;\n\t" \
|
||||
"clts ;\n\t" \
|
||||
"movups %%xmm0,(%1) ;\n\t" \
|
||||
"movups %%xmm1,0x10(%1) ;\n\t" \
|
||||
"movups %%xmm2,0x20(%1) ;\n\t" \
|
||||
"movups %%xmm3,0x30(%1) ;\n\t" \
|
||||
: "=&r" (cr0) \
|
||||
"movups %%xmm0,(%0) ;\n\t" \
|
||||
"movups %%xmm1,0x10(%0) ;\n\t" \
|
||||
"movups %%xmm2,0x20(%0) ;\n\t" \
|
||||
"movups %%xmm3,0x30(%0) ;\n\t" \
|
||||
: \
|
||||
: "r" (xmm_save) \
|
||||
: "memory"); \
|
||||
} while(0)
|
||||
@@ -550,14 +550,14 @@ static struct xor_block_template xor_block_p5_mmx = {
|
||||
#define XMMS_RESTORE do { \
|
||||
__asm__ __volatile__ ( \
|
||||
"sfence ;\n\t" \
|
||||
"movups (%1),%%xmm0 ;\n\t" \
|
||||
"movups 0x10(%1),%%xmm1 ;\n\t" \
|
||||
"movups 0x20(%1),%%xmm2 ;\n\t" \
|
||||
"movups 0x30(%1),%%xmm3 ;\n\t" \
|
||||
"movl %0,%%cr0 ;\n\t" \
|
||||
"movups (%0),%%xmm0 ;\n\t" \
|
||||
"movups 0x10(%0),%%xmm1 ;\n\t" \
|
||||
"movups 0x20(%0),%%xmm2 ;\n\t" \
|
||||
"movups 0x30(%0),%%xmm3 ;\n\t" \
|
||||
: \
|
||||
: "r" (cr0), "r" (xmm_save) \
|
||||
: "r" (xmm_save) \
|
||||
: "memory"); \
|
||||
write_cr0(cr0); \
|
||||
preempt_enable(); \
|
||||
} while(0)
|
||||
|
||||
|
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