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net: hns3: fix mixed flag HCLGE_FLAG_MQPRIO_ENABLE and HCLGE_FLAG_DCB_ENABLE

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[ Upstream commit 0472e95ffeac8e61259eec17ab61608c6b35599d ]

HCLGE_FLAG_MQPRIO_ENABLE is supposed to set when enable
multiple TCs with tc mqprio, and HCLGE_FLAG_DCB_ENABLE is
supposed to set when enable multiple TCs with ets. But
the driver mixed the flags when updating the tm configuration.

Furtherly, PFC should be available when HCLGE_FLAG_MQPRIO_ENABLE
too, so remove the unnecessary limitation.

Fixes: 5a5c90917467 ("net: hns3: add support for tc mqprio offload")
Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Jian Shen
2021-09-29 17:35:52 +08:00
committed by Greg Kroah-Hartman
parent 8d3d27664e
commit 64dae9551f
2 changed files with 10 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_dcb.c
View File

@@ -248,6 +248,10 @@ static int hclge_ieee_setets(struct hnae3_handle *h, struct ieee_ets *ets)
} }
hclge_tm_schd_info_update(hdev, num_tc); hclge_tm_schd_info_update(hdev, num_tc);
if (num_tc > 1)
hdev->flag |= HCLGE_FLAG_DCB_ENABLE;
else
hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;
ret = hclge_ieee_ets_to_tm_info(hdev, ets); ret = hclge_ieee_ets_to_tm_info(hdev, ets);
if (ret) if (ret)
@@ -313,8 +317,7 @@ static int hclge_ieee_setpfc(struct hnae3_handle *h, struct ieee_pfc *pfc)
u8 i, j, pfc_map, *prio_tc; u8 i, j, pfc_map, *prio_tc;
int ret; int ret;
if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) || if (!(hdev->dcbx_cap & DCB_CAP_DCBX_VER_IEEE))
hdev->flag & HCLGE_FLAG_MQPRIO_ENABLE)
return -EINVAL; return -EINVAL;
if (pfc->pfc_en == hdev->tm_info.pfc_en) if (pfc->pfc_en == hdev->tm_info.pfc_en)

31
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c
View File

@@ -646,14 +646,6 @@ static void hclge_tm_tc_info_init(struct hclge_dev *hdev)
for (i = 0; i < HNAE3_MAX_USER_PRIO; i++) for (i = 0; i < HNAE3_MAX_USER_PRIO; i++)
hdev->tm_info.prio_tc[i] = hdev->tm_info.prio_tc[i] =
(i >= hdev->tm_info.num_tc) ? 0 : i; (i >= hdev->tm_info.num_tc) ? 0 : i;
/* DCB is enabled if we have more than 1 TC or pfc_en is
* non-zero.
*/
if (hdev->tm_info.num_tc > 1 || hdev->tm_info.pfc_en)
hdev->flag |= HCLGE_FLAG_DCB_ENABLE;
else
hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;
} }
static void hclge_tm_pg_info_init(struct hclge_dev *hdev) static void hclge_tm_pg_info_init(struct hclge_dev *hdev)
@@ -684,10 +676,10 @@ static void hclge_tm_pg_info_init(struct hclge_dev *hdev)
static void hclge_update_fc_mode_by_dcb_flag(struct hclge_dev *hdev) static void hclge_update_fc_mode_by_dcb_flag(struct hclge_dev *hdev)
{ {
if (!(hdev->flag & HCLGE_FLAG_DCB_ENABLE)) { if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en) {
if (hdev->fc_mode_last_time == HCLGE_FC_PFC) if (hdev->fc_mode_last_time == HCLGE_FC_PFC)
dev_warn(&hdev->pdev->dev, dev_warn(&hdev->pdev->dev,
"DCB is disable, but last mode is FC_PFC\n"); "Only 1 tc used, but last mode is FC_PFC\n");
hdev->tm_info.fc_mode = hdev->fc_mode_last_time; hdev->tm_info.fc_mode = hdev->fc_mode_last_time;
} else if (hdev->tm_info.fc_mode != HCLGE_FC_PFC) { } else if (hdev->tm_info.fc_mode != HCLGE_FC_PFC) {
@@ -713,7 +705,7 @@ static void hclge_update_fc_mode(struct hclge_dev *hdev)
} }
} }
static void hclge_pfc_info_init(struct hclge_dev *hdev) void hclge_tm_pfc_info_update(struct hclge_dev *hdev)
{ {
if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3) if (hdev->ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3)
hclge_update_fc_mode(hdev); hclge_update_fc_mode(hdev);
@@ -729,7 +721,7 @@ static void hclge_tm_schd_info_init(struct hclge_dev *hdev)
hclge_tm_vport_info_update(hdev); hclge_tm_vport_info_update(hdev);
hclge_pfc_info_init(hdev); hclge_tm_pfc_info_update(hdev);
} }
static int hclge_tm_pg_to_pri_map(struct hclge_dev *hdev) static int hclge_tm_pg_to_pri_map(struct hclge_dev *hdev)
@@ -1465,19 +1457,6 @@ void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc)
hclge_tm_schd_info_init(hdev); hclge_tm_schd_info_init(hdev);
} }
void hclge_tm_pfc_info_update(struct hclge_dev *hdev)
{
/* DCB is enabled if we have more than 1 TC or pfc_en is
* non-zero.
*/
if (hdev->tm_info.num_tc > 1 || hdev->tm_info.pfc_en)
hdev->flag |= HCLGE_FLAG_DCB_ENABLE;
else
hdev->flag &= ~HCLGE_FLAG_DCB_ENABLE;
hclge_pfc_info_init(hdev);
}
int hclge_tm_init_hw(struct hclge_dev *hdev, bool init) int hclge_tm_init_hw(struct hclge_dev *hdev, bool init)
{ {
int ret; int ret;
@@ -1523,7 +1502,7 @@ int hclge_tm_vport_map_update(struct hclge_dev *hdev)
if (ret) if (ret)
return ret; return ret;
if (!(hdev->flag & HCLGE_FLAG_DCB_ENABLE)) if (hdev->tm_info.num_tc == 1 && !hdev->tm_info.pfc_en)
return 0; return 0;
return hclge_tm_bp_setup(hdev); return hclge_tm_bp_setup(hdev);