ARM: omap: clean up DMA register accesses
We can do much better with this by using a structure to describe each register, rather than code. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
@@ -32,53 +32,52 @@
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#define OMAP1_DMA_BASE (0xfffed800)
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#define OMAP1_LOGICAL_DMA_CH_COUNT 17
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#define OMAP1_DMA_STRIDE 0x40
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static u32 errata;
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static u32 enable_1510_mode;
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static u16 reg_map[] = {
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[GCR] = 0x400,
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[GSCR] = 0x404,
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[GRST1] = 0x408,
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[HW_ID] = 0x442,
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[PCH2_ID] = 0x444,
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[PCH0_ID] = 0x446,
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[PCH1_ID] = 0x448,
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[PCHG_ID] = 0x44a,
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[PCHD_ID] = 0x44c,
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[CAPS_0] = 0x44e,
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[CAPS_1] = 0x452,
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[CAPS_2] = 0x456,
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[CAPS_3] = 0x458,
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[CAPS_4] = 0x45a,
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[PCH2_SR] = 0x460,
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[PCH0_SR] = 0x480,
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[PCH1_SR] = 0x482,
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[PCHD_SR] = 0x4c0,
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static const struct omap_dma_reg reg_map[] = {
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[GCR] = { 0x0400, 0x00, OMAP_DMA_REG_16BIT },
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[GSCR] = { 0x0404, 0x00, OMAP_DMA_REG_16BIT },
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[GRST1] = { 0x0408, 0x00, OMAP_DMA_REG_16BIT },
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[HW_ID] = { 0x0442, 0x00, OMAP_DMA_REG_16BIT },
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[PCH2_ID] = { 0x0444, 0x00, OMAP_DMA_REG_16BIT },
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[PCH0_ID] = { 0x0446, 0x00, OMAP_DMA_REG_16BIT },
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[PCH1_ID] = { 0x0448, 0x00, OMAP_DMA_REG_16BIT },
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[PCHG_ID] = { 0x044a, 0x00, OMAP_DMA_REG_16BIT },
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[PCHD_ID] = { 0x044c, 0x00, OMAP_DMA_REG_16BIT },
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[CAPS_0] = { 0x044e, 0x00, OMAP_DMA_REG_2X16BIT },
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[CAPS_1] = { 0x0452, 0x00, OMAP_DMA_REG_2X16BIT },
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[CAPS_2] = { 0x0456, 0x00, OMAP_DMA_REG_16BIT },
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[CAPS_3] = { 0x0458, 0x00, OMAP_DMA_REG_16BIT },
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[CAPS_4] = { 0x045a, 0x00, OMAP_DMA_REG_16BIT },
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[PCH2_SR] = { 0x0460, 0x00, OMAP_DMA_REG_16BIT },
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[PCH0_SR] = { 0x0480, 0x00, OMAP_DMA_REG_16BIT },
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[PCH1_SR] = { 0x0482, 0x00, OMAP_DMA_REG_16BIT },
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[PCHD_SR] = { 0x04c0, 0x00, OMAP_DMA_REG_16BIT },
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/* Common Registers */
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[CSDP] = 0x00,
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[CCR] = 0x02,
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[CICR] = 0x04,
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[CSR] = 0x06,
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[CEN] = 0x10,
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[CFN] = 0x12,
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[CSFI] = 0x14,
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[CSEI] = 0x16,
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[CPC] = 0x18, /* 15xx only */
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[CSAC] = 0x18,
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[CDAC] = 0x1a,
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[CDEI] = 0x1c,
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[CDFI] = 0x1e,
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[CLNK_CTRL] = 0x28,
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[CSDP] = { 0x0000, 0x40, OMAP_DMA_REG_16BIT },
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[CCR] = { 0x0002, 0x40, OMAP_DMA_REG_16BIT },
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[CICR] = { 0x0004, 0x40, OMAP_DMA_REG_16BIT },
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[CSR] = { 0x0006, 0x40, OMAP_DMA_REG_16BIT },
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[CEN] = { 0x0010, 0x40, OMAP_DMA_REG_16BIT },
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[CFN] = { 0x0012, 0x40, OMAP_DMA_REG_16BIT },
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[CSFI] = { 0x0014, 0x40, OMAP_DMA_REG_16BIT },
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[CSEI] = { 0x0016, 0x40, OMAP_DMA_REG_16BIT },
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[CPC] = { 0x0018, 0x40, OMAP_DMA_REG_16BIT }, /* 15xx only */
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[CSAC] = { 0x0018, 0x40, OMAP_DMA_REG_16BIT },
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[CDAC] = { 0x001a, 0x40, OMAP_DMA_REG_16BIT },
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[CDEI] = { 0x001c, 0x40, OMAP_DMA_REG_16BIT },
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[CDFI] = { 0x001e, 0x40, OMAP_DMA_REG_16BIT },
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[CLNK_CTRL] = { 0x0028, 0x40, OMAP_DMA_REG_16BIT },
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/* Channel specific register offsets */
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[CSSA] = 0x08,
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[CDSA] = 0x0c,
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[COLOR] = 0x20,
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[CCR2] = 0x24,
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[LCH_CTRL] = 0x2a,
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[CSSA] = { 0x0008, 0x40, OMAP_DMA_REG_2X16BIT },
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[CDSA] = { 0x000c, 0x40, OMAP_DMA_REG_2X16BIT },
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[COLOR] = { 0x0020, 0x40, OMAP_DMA_REG_2X16BIT },
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[CCR2] = { 0x0024, 0x40, OMAP_DMA_REG_16BIT },
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[LCH_CTRL] = { 0x002a, 0x40, OMAP_DMA_REG_16BIT },
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};
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static struct resource res[] __initdata = {
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@@ -179,36 +178,28 @@ static struct resource res[] __initdata = {
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static void __iomem *dma_base;
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static inline void dma_write(u32 val, int reg, int lch)
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{
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u8 stride;
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u32 offset;
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void __iomem *addr = dma_base;
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stride = (reg >= CPC) ? OMAP1_DMA_STRIDE : 0;
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offset = reg_map[reg] + (stride * lch);
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addr += reg_map[reg].offset;
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addr += reg_map[reg].stride * lch;
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__raw_writew(val, dma_base + offset);
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if ((reg > CLNK_CTRL && reg < CCEN) ||
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(reg > PCHD_ID && reg < CAPS_2)) {
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u32 offset2 = reg_map[reg] + 2 + (stride * lch);
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__raw_writew(val >> 16, dma_base + offset2);
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}
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__raw_writew(val, addr);
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if (reg_map[reg].type == OMAP_DMA_REG_2X16BIT)
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__raw_writew(val >> 16, addr + 2);
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}
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static inline u32 dma_read(int reg, int lch)
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{
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u8 stride;
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u32 offset, val;
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void __iomem *addr = dma_base;
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uint32_t val;
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stride = (reg >= CPC) ? OMAP1_DMA_STRIDE : 0;
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offset = reg_map[reg] + (stride * lch);
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addr += reg_map[reg].offset;
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addr += reg_map[reg].stride * lch;
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val = __raw_readw(addr);
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if (reg_map[reg].type == OMAP_DMA_REG_2X16BIT)
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val |= __raw_readw(addr + 2) << 16;
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val = __raw_readw(dma_base + offset);
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if ((reg > CLNK_CTRL && reg < CCEN) ||
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(reg > PCHD_ID && reg < CAPS_2)) {
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u16 upper;
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u32 offset2 = reg_map[reg] + 2 + (stride * lch);
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upper = __raw_readw(dma_base + offset2);
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val |= (upper << 16);
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}
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return val;
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}
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