Merge commit 'v2.6.35-rc3' into perf/core
Merge reason: Go from -rc1 base to -rc3 base, merge in fixes.
This commit is contained in:
@@ -1,4 +1,4 @@
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.section .text.page_aligned
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.section .text..page_aligned
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/page_types.h>
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@@ -1487,6 +1487,7 @@ static int __attach_device(struct device *dev,
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struct protection_domain *domain)
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{
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struct iommu_dev_data *dev_data, *alias_data;
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int ret;
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dev_data = get_dev_data(dev);
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alias_data = get_dev_data(dev_data->alias);
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@@ -1498,13 +1499,14 @@ static int __attach_device(struct device *dev,
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spin_lock(&domain->lock);
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/* Some sanity checks */
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ret = -EBUSY;
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if (alias_data->domain != NULL &&
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alias_data->domain != domain)
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return -EBUSY;
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goto out_unlock;
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if (dev_data->domain != NULL &&
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dev_data->domain != domain)
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return -EBUSY;
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goto out_unlock;
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/* Do real assignment */
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if (dev_data->alias != dev) {
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@@ -1520,10 +1522,14 @@ static int __attach_device(struct device *dev,
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atomic_inc(&dev_data->bind);
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ret = 0;
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out_unlock:
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/* ready */
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spin_unlock(&domain->lock);
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return 0;
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return ret;
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}
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/*
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@@ -2324,10 +2330,6 @@ int __init amd_iommu_init_dma_ops(void)
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iommu_detected = 1;
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swiotlb = 0;
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#ifdef CONFIG_GART_IOMMU
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gart_iommu_aperture_disabled = 1;
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gart_iommu_aperture = 0;
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#endif
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/* Make the driver finally visible to the drivers */
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dma_ops = &amd_iommu_dma_ops;
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@@ -287,8 +287,12 @@ static u8 * __init iommu_map_mmio_space(u64 address)
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{
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u8 *ret;
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if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu"))
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if (!request_mem_region(address, MMIO_REGION_LENGTH, "amd_iommu")) {
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pr_err("AMD-Vi: Can not reserve memory region %llx for mmio\n",
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address);
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pr_err("AMD-Vi: This is a BIOS bug. Please contact your hardware vendor\n");
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return NULL;
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}
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ret = ioremap_nocache(address, MMIO_REGION_LENGTH);
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if (ret != NULL)
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@@ -1314,7 +1318,7 @@ static int __init amd_iommu_init(void)
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ret = amd_iommu_init_dma_ops();
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if (ret)
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goto free;
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goto free_disable;
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amd_iommu_init_api();
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@@ -1332,9 +1336,10 @@ static int __init amd_iommu_init(void)
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out:
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return ret;
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free:
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free_disable:
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disable_iommus();
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free:
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amd_iommu_uninit_devices();
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free_pages((unsigned long)amd_iommu_pd_alloc_bitmap,
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@@ -1353,6 +1358,15 @@ free:
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free_unity_maps();
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#ifdef CONFIG_GART_IOMMU
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/*
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* We failed to initialize the AMD IOMMU - try fallback to GART
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* if possible.
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*/
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gart_iommu_init();
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#endif
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goto out;
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}
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@@ -36,6 +36,7 @@
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/debugfs.h>
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#include <linux/edac_mce.h>
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#include <asm/processor.h>
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#include <asm/hw_irq.h>
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@@ -168,6 +169,15 @@ void mce_log(struct mce *mce)
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for (;;) {
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entry = rcu_dereference_check_mce(mcelog.next);
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for (;;) {
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/*
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* If edac_mce is enabled, it will check the error type
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* and will process it, if it is a known error.
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* Otherwise, the error will be sent through mcelog
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* interface
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*/
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if (edac_mce_parse(mce))
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return;
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/*
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* When the buffer fills up discard new entries.
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* Assume that the earlier errors are the more
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@@ -34,7 +34,7 @@ EXPORT_SYMBOL(init_task);
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/*
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* per-CPU TSS segments. Threads are completely 'soft' on Linux,
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* no more per-task TSS's. The TSS size is kept cacheline-aligned
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* so they are allowed to end up in the .data.cacheline_aligned
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* so they are allowed to end up in the .data..cacheline_aligned
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* section. Since TSS's are completely CPU-local, we want them
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* on exact cacheline boundaries, to eliminate cacheline ping-pong.
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*/
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@@ -21,12 +21,6 @@
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#include <asm/cpu.h>
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#include <asm/stackprotector.h>
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#ifdef CONFIG_DEBUG_PER_CPU_MAPS
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# define DBG(fmt, ...) pr_dbg(fmt, ##__VA_ARGS__)
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#else
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# define DBG(fmt, ...) do { if (0) pr_dbg(fmt, ##__VA_ARGS__); } while (0)
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#endif
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DEFINE_PER_CPU(int, cpu_number);
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EXPORT_PER_CPU_SYMBOL(cpu_number);
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@@ -247,7 +241,7 @@ void __init setup_per_cpu_areas(void)
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#endif
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#endif
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/*
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* Up to this point, the boot CPU has been using .data.init
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* Up to this point, the boot CPU has been using .init.data
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* area. Reload any changed state for the boot CPU.
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*/
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if (cpu == boot_cpu_id)
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@@ -686,7 +686,7 @@ static void __cpuinit do_fork_idle(struct work_struct *work)
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static void __cpuinit announce_cpu(int cpu, int apicid)
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{
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static int current_node = -1;
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int node = cpu_to_node(cpu);
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int node = early_cpu_to_node(cpu);
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if (system_state == SYSTEM_BOOTING) {
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if (node != current_node) {
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@@ -97,7 +97,7 @@ SECTIONS
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HEAD_TEXT
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#ifdef CONFIG_X86_32
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. = ALIGN(PAGE_SIZE);
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*(.text.page_aligned)
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*(.text..page_aligned)
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#endif
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. = ALIGN(8);
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_stext = .;
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@@ -305,7 +305,7 @@ SECTIONS
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. = ALIGN(PAGE_SIZE);
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.bss : AT(ADDR(.bss) - LOAD_OFFSET) {
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__bss_start = .;
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*(.bss.page_aligned)
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*(.bss..page_aligned)
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*(.bss)
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. = ALIGN(4);
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__bss_stop = .;
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