xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
複製 0
程式碼 問題管理 合併請求 Actions Packages Projects 版本發佈 Wiki Activity

usb: dwc2: gadget: add reset flag in init function

瀏覽代碼 
Add a flag to request physical reset of the controller when
s3c_hsotg_core_init_disconnected is called.
During the usb reset, controller must not be fully reconfigured and
resetted. Else this leads to shorter chirp-k duration during
enumeration.

Tested-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Gregory Herrero
2015-01-30 09:09:32 +01:00
committed by Felipe Balbi
父節點 7d24c1b5a7
當前提交 643cc4dee1
共有 3 個文件被更改，包括 26 次插入 和 15 次删除
Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/usb/dwc2/gadget.c
查看文件

@@ -2271,9 +2271,13 @@ static int s3c_hsotg_corereset(struct dwc2_hsotg *hsotg)
*
* Issue a soft reset to the core, and await the core finishing it.
*/
void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg)
void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
bool is_usb_reset)
{
s3c_hsotg_corereset(hsotg);
u32 val;
if (!is_usb_reset)
s3c_hsotg_corereset(hsotg);
/*
* we must now enable ep0 ready for host detection and then
@@ -2286,7 +2290,8 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg)
s3c_hsotg_init_fifo(hsotg);
__orr32(hsotg->regs + DCTL, DCTL_SFTDISCON);
if (!is_usb_reset)
__orr32(hsotg->regs + DCTL, DCTL_SFTDISCON);
writel(1 << 18 | DCFG_DEVSPD_HS, hsotg->regs + DCFG);
@@ -2357,9 +2362,11 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg)
s3c_hsotg_ctrl_epint(hsotg, 0, 0, 1);
s3c_hsotg_ctrl_epint(hsotg, 0, 1, 1);
__orr32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE);
udelay(10); /* see openiboot */
__bic32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE);
if (!is_usb_reset) {
__orr32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE);
udelay(10); /* see openiboot */
__bic32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE);
}
dev_dbg(hsotg->dev, "DCTL=0x%08x\n", readl(hsotg->regs + DCTL));
@@ -2388,8 +2395,10 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg)
readl(hsotg->regs + DOEPCTL0));
/* clear global NAKs */
writel(DCTL_CGOUTNAK | DCTL_CGNPINNAK | DCTL_SFTDISCON,
hsotg->regs + DCTL);
val = DCTL_CGOUTNAK | DCTL_CGNPINNAK;
if (!is_usb_reset)
val |= DCTL_SFTDISCON;
__orr32(hsotg->regs + DCTL, val);
/* must be at-least 3ms to allow bus to see disconnect */
mdelay(3);
@@ -2482,7 +2491,7 @@ irq_retry:
kill_all_requests(hsotg, hsotg->eps_out[0],
-ECONNRESET);
s3c_hsotg_core_init_disconnected(hsotg);
s3c_hsotg_core_init_disconnected(hsotg, true);
s3c_hsotg_core_connect(hsotg);
}
}
@@ -3052,7 +3061,7 @@ static int s3c_hsotg_udc_start(struct usb_gadget *gadget,
spin_lock_irqsave(&hsotg->lock, flags);
s3c_hsotg_init(hsotg);
s3c_hsotg_core_init_disconnected(hsotg);
s3c_hsotg_core_init_disconnected(hsotg, false);
hsotg->enabled = 0;
spin_unlock_irqrestore(&hsotg->lock, flags);
@@ -3171,7 +3180,7 @@ static int s3c_hsotg_vbus_session(struct usb_gadget *gadget, int is_active)
if (is_active) {
/* Kill any ep0 requests as controller will be reinitialized */
kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET);
s3c_hsotg_core_init_disconnected(hsotg);
s3c_hsotg_core_init_disconnected(hsotg, false);
if (hsotg->enabled)
s3c_hsotg_core_connect(hsotg);
} else {
@@ -4097,7 +4106,7 @@ int s3c_hsotg_resume(struct dwc2_hsotg *hsotg)
s3c_hsotg_phy_enable(hsotg);
spin_lock_irqsave(&hsotg->lock, flags);
s3c_hsotg_core_init_disconnected(hsotg);
s3c_hsotg_core_init_disconnected(hsotg, false);
if (hsotg->enabled)
s3c_hsotg_core_connect(hsotg);
spin_unlock_irqrestore(&hsotg->lock, flags);