Merge tag 'pci-v4.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas: "PCI changes for v4.6: Enumeration: - Disable IO/MEM decoding for devices with non-compliant BARs (Bjorn Helgaas) - Mark Broadwell-EP Home Agent & PCU as having non-compliant BARs (Bjorn Helgaas Resource management: - Mark shadow copy of VGA ROM as IORESOURCE_PCI_FIXED (Bjorn Helgaas) - Don't assign or reassign immutable resources (Bjorn Helgaas) - Don't enable/disable ROM BAR if we're using a RAM shadow copy (Bjorn Helgaas) - Set ROM shadow location in arch code, not in PCI core (Bjorn Helgaas) - Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs (Bjorn Helgaas) - ia64: Use ioremap() instead of open-coded equivalent (Bjorn Helgaas) - ia64: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) - MIPS: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) - Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY (Bjorn Helgaas) - Don't leak memory if sysfs_create_bin_file() fails (Bjorn Helgaas) - rcar: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) - designware: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) Virtualization: - Wait for up to 1000ms after FLR reset (Alex Williamson) - Support SR-IOV on any function type (Kelly Zytaruk) - Add ACS quirk for all Cavium devices (Manish Jaggi) AER: - Rename pci_ops_aer to aer_inj_pci_ops (Bjorn Helgaas) - Restore pci_ops pointer while calling original pci_ops (David Daney) - Fix aer_inject error codes (Jean Delvare) - Use dev_warn() in aer_inject (Jean Delvare) - Log actual error causes in aer_inject (Jean Delvare) - Log aer_inject error injections (Jean Delvare) VPD: - Prevent VPD access for buggy devices (Babu Moger) - Move pci_read_vpd() and pci_write_vpd() close to other VPD code (Bjorn Helgaas) - Move pci_vpd_release() from header file to pci/access.c (Bjorn Helgaas) - Remove struct pci_vpd_ops.release function pointer (Bjorn Helgaas) - Rename VPD symbols to remove unnecessary "pci22" (Bjorn Helgaas) - Fold struct pci_vpd_pci22 into struct pci_vpd (Bjorn Helgaas) - Sleep rather than busy-wait for VPD access completion (Bjorn Helgaas) - Update VPD definitions (Hannes Reinecke) - Allow access to VPD attributes with size 0 (Hannes Reinecke) - Determine actual VPD size on first access (Hannes Reinecke) Generic host bridge driver: - Move structure definitions to separate header file (David Daney) - Add pci_host_common_probe(), based on gen_pci_probe() (David Daney) - Expose pci_host_common_probe() for use by other drivers (David Daney) Altera host bridge driver: - Fix altera_pcie_link_is_up() (Ley Foon Tan) Cavium ThunderX host bridge driver: - Add PCIe host driver for ThunderX processors (David Daney) - Add driver for ThunderX-pass{1,2} on-chip devices (David Daney) Freescale i.MX6 host bridge driver: - Add DT bindings to configure PHY Tx driver settings (Justin Waters) - Move imx6_pcie_reset_phy() near other PHY handling functions (Lucas Stach) - Move PHY reset into imx6_pcie_establish_link() (Lucas Stach) - Remove broken Gen2 workaround (Lucas Stach) - Move link up check into imx6_pcie_wait_for_link() (Lucas Stach) Freescale Layerscape host bridge driver: - Add "fsl,ls2085a-pcie" compatible ID (Yang Shi) Intel VMD host bridge driver: - Attach VMD resources to parent domain's resource tree (Jon Derrick) - Set bus resource start to 0 (Keith Busch) Microsoft Hyper-V host bridge driver: - Add fwnode_handle to x86 pci_sysdata (Jake Oshins) - Look up IRQ domain by fwnode_handle (Jake Oshins) - Add paravirtual PCI front-end for Microsoft Hyper-V VMs (Jake Oshins) NVIDIA Tegra host bridge driver: - Add pci_ops.{add,remove}_bus() callbacks (Thierry Reding) - Implement ->{add,remove}_bus() callbacks (Thierry Reding) - Remove unused struct tegra_pcie.num_ports field (Thierry Reding) - Track bus -> CPU mapping (Thierry Reding) - Remove misleading PHYS_OFFSET (Thierry Reding) Renesas R-Car host bridge driver: - Depend on ARCH_RENESAS, not ARCH_SHMOBILE (Simon Horman) Synopsys DesignWare host bridge driver: - ARC: Add PCI support (Joao Pinto) - Add generic dw_pcie_wait_for_link() (Joao Pinto) - Add default link up check if sub-driver doesn't override (Joao Pinto) - Add driver for prototyping kits based on ARC SDP (Joao Pinto) TI Keystone host bridge driver: - Defer probing if devm_phy_get() returns -EPROBE_DEFER (Shawn Lin) Xilinx AXI host bridge driver: - Use of_pci_get_host_bridge_resources() to parse DT (Bharat Kumar Gogada) - Remove dependency on ARM-specific struct hw_pci (Bharat Kumar Gogada) - Don't call pci_fixup_irqs() on Microblaze (Bharat Kumar Gogada) - Update Zynq binding with Microblaze node (Bharat Kumar Gogada) - microblaze: Support generic Xilinx AXI PCIe Host Bridge IP driver (Bharat Kumar Gogada) Xilinx NWL host bridge driver: - Add support for Xilinx NWL PCIe Host Controller (Bharat Kumar Gogada) Miscellaneous: - Check device_attach() return value always (Bjorn Helgaas) - Move pci_set_flags() from asm-generic/pci-bridge.h to linux/pci.h (Bjorn Helgaas) - Remove includes of empty asm-generic/pci-bridge.h (Bjorn Helgaas) - ARM64: Remove generated include of asm-generic/pci-bridge.h (Bjorn Helgaas) - Remove empty asm-generic/pci-bridge.h (Bjorn Helgaas) - Remove includes of asm/pci-bridge.h (Bjorn Helgaas) - Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.h (Bjorn Helgaas) - unicore32: Remove unused HAVE_ARCH_PCI_SET_DMA_MASK definition (Bjorn Helgaas) - Cleanup pci/pcie/Kconfig whitespace (Andreas Ziegler) - Include pci/hotplug Kconfig directly from pci/Kconfig (Bjorn Helgaas) - Include pci/pcie/Kconfig directly from pci/Kconfig (Bogicevic Sasa) - frv: Remove stray pci_{alloc,free}_consistent() declaration (Christoph Hellwig) - Move pci_dma_* helpers to common code (Christoph Hellwig) - Add PCI_CLASS_SERIAL_USB_DEVICE definition (Heikki Krogerus) - Add QEMU top-level IDs for (sub)vendor & device (Robin H. Johnson) - Fix broken URL for Dell biosdevname (Naga Venkata Sai Indubhaskar Jupudi)" * tag 'pci-v4.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits) PCI: Add PCI_CLASS_SERIAL_USB_DEVICE definition PCI: designware: Add driver for prototyping kits based on ARC SDP PCI: designware: Add default link up check if sub-driver doesn't override PCI: designware: Add generic dw_pcie_wait_for_link() PCI: Cleanup pci/pcie/Kconfig whitespace PCI: Simplify pci_create_attr() control flow PCI: Don't leak memory if sysfs_create_bin_file() fails PCI: Simplify sysfs ROM cleanup PCI: Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY MIPS: Loongson 3: Keep CPU physical (not virtual) addresses in shadow ROM resource MIPS: Loongson 3: Use temporary struct resource * to avoid repetition ia64/PCI: Keep CPU physical (not virtual) addresses in shadow ROM resource ia64/PCI: Use ioremap() instead of open-coded equivalent ia64/PCI: Use temporary struct resource * to avoid repetition PCI: Clean up pci_map_rom() whitespace PCI: Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs PCI: thunder: Add driver for ThunderX-pass{1,2} on-chip devices PCI: thunder: Add PCIe host driver for ThunderX processors PCI: generic: Expose pci_host_common_probe() for use by other drivers PCI: generic: Add pci_host_common_probe(), based on gen_pci_probe() ...
This commit is contained in:
@@ -44,6 +44,7 @@ config PCIEASPM
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/sys/module/pcie_aspm/parameters/policy
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When in doubt, say Y.
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config PCIEASPM_DEBUG
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bool "Debug PCI Express ASPM"
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depends on PCIEASPM
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@@ -58,20 +59,20 @@ choice
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depends on PCIEASPM
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config PCIEASPM_DEFAULT
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bool "BIOS default"
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bool "BIOS default"
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depends on PCIEASPM
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help
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Use the BIOS defaults for PCI Express ASPM.
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config PCIEASPM_POWERSAVE
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bool "Powersave"
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bool "Powersave"
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depends on PCIEASPM
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help
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Enable PCI Express ASPM L0s and L1 where possible, even if the
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BIOS did not.
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config PCIEASPM_PERFORMANCE
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bool "Performance"
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bool "Performance"
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depends on PCIEASPM
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help
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Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
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@@ -25,6 +25,7 @@
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#include <linux/fs.h>
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#include <linux/uaccess.h>
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#include <linux/stddef.h>
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#include <linux/device.h>
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#include "aerdrv.h"
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/* Override the existing corrected and uncorrected error masks */
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@@ -124,16 +125,13 @@ static struct pci_ops *__find_pci_bus_ops(struct pci_bus *bus)
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static struct pci_bus_ops *pci_bus_ops_pop(void)
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{
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unsigned long flags;
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struct pci_bus_ops *bus_ops = NULL;
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struct pci_bus_ops *bus_ops;
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spin_lock_irqsave(&inject_lock, flags);
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if (list_empty(&pci_bus_ops_list))
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bus_ops = NULL;
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else {
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struct list_head *lh = pci_bus_ops_list.next;
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list_del(lh);
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bus_ops = list_entry(lh, struct pci_bus_ops, list);
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}
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bus_ops = list_first_entry_or_null(&pci_bus_ops_list,
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struct pci_bus_ops, list);
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if (bus_ops)
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list_del(&bus_ops->list);
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spin_unlock_irqrestore(&inject_lock, flags);
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return bus_ops;
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}
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@@ -181,14 +179,16 @@ static u32 *find_pci_config_dword(struct aer_error *err, int where,
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return target;
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}
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static int pci_read_aer(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 *val)
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static int aer_inj_read_config(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 *val)
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{
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u32 *sim;
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struct aer_error *err;
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unsigned long flags;
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struct pci_ops *ops;
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struct pci_ops *my_ops;
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int domain;
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int rv;
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spin_lock_irqsave(&inject_lock, flags);
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if (size != sizeof(u32))
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@@ -208,19 +208,32 @@ static int pci_read_aer(struct pci_bus *bus, unsigned int devfn, int where,
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}
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out:
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ops = __find_pci_bus_ops(bus);
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/*
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* pci_lock must already be held, so we can directly
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* manipulate bus->ops. Many config access functions,
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* including pci_generic_config_read() require the original
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* bus->ops be installed to function, so temporarily put them
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* back.
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*/
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my_ops = bus->ops;
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bus->ops = ops;
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rv = ops->read(bus, devfn, where, size, val);
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bus->ops = my_ops;
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spin_unlock_irqrestore(&inject_lock, flags);
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return ops->read(bus, devfn, where, size, val);
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return rv;
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}
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static int pci_write_aer(struct pci_bus *bus, unsigned int devfn, int where,
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int size, u32 val)
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static int aer_inj_write_config(struct pci_bus *bus, unsigned int devfn,
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int where, int size, u32 val)
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{
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u32 *sim;
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struct aer_error *err;
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unsigned long flags;
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int rw1cs;
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struct pci_ops *ops;
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struct pci_ops *my_ops;
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int domain;
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int rv;
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spin_lock_irqsave(&inject_lock, flags);
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if (size != sizeof(u32))
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@@ -243,13 +256,24 @@ static int pci_write_aer(struct pci_bus *bus, unsigned int devfn, int where,
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}
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out:
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ops = __find_pci_bus_ops(bus);
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/*
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* pci_lock must already be held, so we can directly
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* manipulate bus->ops. Many config access functions,
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* including pci_generic_config_write() require the original
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* bus->ops be installed to function, so temporarily put them
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* back.
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*/
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my_ops = bus->ops;
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bus->ops = ops;
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rv = ops->write(bus, devfn, where, size, val);
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bus->ops = my_ops;
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spin_unlock_irqrestore(&inject_lock, flags);
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return ops->write(bus, devfn, where, size, val);
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return rv;
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}
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static struct pci_ops pci_ops_aer = {
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.read = pci_read_aer,
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.write = pci_write_aer,
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static struct pci_ops aer_inj_pci_ops = {
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.read = aer_inj_read_config,
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.write = aer_inj_write_config,
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};
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static void pci_bus_ops_init(struct pci_bus_ops *bus_ops,
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@@ -270,9 +294,9 @@ static int pci_bus_set_aer_ops(struct pci_bus *bus)
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bus_ops = kmalloc(sizeof(*bus_ops), GFP_KERNEL);
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if (!bus_ops)
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return -ENOMEM;
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ops = pci_bus_set_ops(bus, &pci_ops_aer);
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ops = pci_bus_set_ops(bus, &aer_inj_pci_ops);
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spin_lock_irqsave(&inject_lock, flags);
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if (ops == &pci_ops_aer)
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if (ops == &aer_inj_pci_ops)
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goto out;
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pci_bus_ops_init(bus_ops, bus, ops);
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list_add(&bus_ops->list, &pci_bus_ops_list);
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@@ -334,13 +358,15 @@ static int aer_inject(struct aer_error_inj *einj)
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return -ENODEV;
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rpdev = pcie_find_root_port(dev);
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if (!rpdev) {
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dev_err(&dev->dev, "aer_inject: Root port not found\n");
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ret = -ENODEV;
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goto out_put;
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}
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pos_cap_err = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
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if (!pos_cap_err) {
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ret = -EPERM;
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dev_err(&dev->dev, "aer_inject: Device doesn't support AER\n");
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ret = -EPROTONOSUPPORT;
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goto out_put;
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}
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pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
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@@ -350,7 +376,9 @@ static int aer_inject(struct aer_error_inj *einj)
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rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
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if (!rp_pos_cap_err) {
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ret = -EPERM;
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dev_err(&rpdev->dev,
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"aer_inject: Root port doesn't support AER\n");
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ret = -EPROTONOSUPPORT;
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goto out_put;
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}
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@@ -397,14 +425,16 @@ static int aer_inject(struct aer_error_inj *einj)
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if (!aer_mask_override && einj->cor_status &&
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!(einj->cor_status & ~cor_mask)) {
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ret = -EINVAL;
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printk(KERN_WARNING "The correctable error(s) is masked by device\n");
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dev_warn(&dev->dev,
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"aer_inject: The correctable error(s) is masked by device\n");
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spin_unlock_irqrestore(&inject_lock, flags);
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goto out_put;
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}
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if (!aer_mask_override && einj->uncor_status &&
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!(einj->uncor_status & ~uncor_mask)) {
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ret = -EINVAL;
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printk(KERN_WARNING "The uncorrectable error(s) is masked by device\n");
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dev_warn(&dev->dev,
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"aer_inject: The uncorrectable error(s) is masked by device\n");
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spin_unlock_irqrestore(&inject_lock, flags);
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goto out_put;
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}
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@@ -457,13 +487,19 @@ static int aer_inject(struct aer_error_inj *einj)
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if (find_aer_device(rpdev, &edev)) {
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if (!get_service_data(edev)) {
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printk(KERN_WARNING "AER service is not initialized\n");
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ret = -EINVAL;
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dev_warn(&edev->device,
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"aer_inject: AER service is not initialized\n");
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ret = -EPROTONOSUPPORT;
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goto out_put;
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}
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dev_info(&edev->device,
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"aer_inject: Injecting errors %08x/%08x into device %s\n",
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einj->cor_status, einj->uncor_status, pci_name(dev));
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aer_irq(-1, edev);
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} else
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ret = -EINVAL;
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} else {
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dev_err(&rpdev->dev, "aer_inject: AER device not found\n");
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ret = -ENODEV;
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}
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out_put:
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kfree(err_alloc);
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kfree(rperr_alloc);
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@@ -396,7 +396,7 @@ static int pcie_pme_suspend(struct pcie_device *srv)
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{
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struct pcie_pme_service_data *data = get_service_data(srv);
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struct pci_dev *port = srv->port;
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bool wakeup;
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bool wakeup, wake_irq_enabled = false;
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int ret;
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if (device_may_wakeup(&port->dev)) {
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@@ -409,11 +409,12 @@ static int pcie_pme_suspend(struct pcie_device *srv)
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spin_lock_irq(&data->lock);
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if (wakeup) {
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ret = enable_irq_wake(srv->irq);
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data->suspend_level = PME_SUSPEND_WAKEUP;
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if (ret == 0) {
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data->suspend_level = PME_SUSPEND_WAKEUP;
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wake_irq_enabled = true;
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}
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}
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if (!wakeup || ret) {
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struct pci_dev *port = srv->port;
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if (!wake_irq_enabled) {
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pcie_pme_interrupt_enable(port, false);
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pcie_clear_root_pme_status(port);
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data->suspend_level = PME_SUSPEND_NOIRQ;
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