sh: Kill off machvec IRQ hinting.
Everything is using sparseirq these days, so we have no need to arbitrarily size nr_irqs ahead of time. The legacy IRQ pre-allocation likewise has no meaning for us, so that's killed off too. We now depend on nr_irqs expansion by the generic hardirq layer instead. It's also worth noting that the majority of boards had completely bogus values for their nr_irqs relative to their CPU and configurations, so this ends up correcting behaviour for quite a few platforms. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@@ -5,12 +5,15 @@
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#include <asm/machvec.h>
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/*
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* A sane default based on a reasonable vector table size, platforms are
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* advised to cap this at the hard limit that they're interested in
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* through the machvec.
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* Only legacy non-sparseirq platforms have to set a reasonably sane
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* value here. sparseirq platforms allocate their irq_descs on the fly,
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* so will expand automatically based on the number of registered IRQs.
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*/
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#define NR_IRQS 512
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#define NR_IRQS_LEGACY 8 /* Legacy external IRQ0-7 */
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#ifdef CONFIG_SPARSE_IRQ
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# define NR_IRQS 8
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#else
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# define NR_IRQS 512
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#endif
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/*
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* This is a special IRQ number for indicating that no IRQ has been
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@@ -17,7 +17,6 @@
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struct sh_machine_vector {
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void (*mv_setup)(char **cmdline_p);
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const char *mv_name;
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int mv_nr_irqs;
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int (*mv_irq_demux)(int irq);
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void (*mv_init_irq)(void);
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