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clk: tegra: Add Tegra124 DFLL clocksource platform driver

Forráskód böngészése 
Add basic platform driver support for the fast CPU cluster DFLL
clocksource found on Tegra124 SoCs. This small driver selects the
appropriate Tegra124-specific characterization data and integration
code. It relies on the DFLL common code to do most of the work.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Michael Turquette <mturquette@linaro.org>
[treding@nvidia.com: move setup code into ->probe()]
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Tuomas Tynkkynen
2015-05-13 17:58:41 +03:00
committed by Thierry Reding
szülő a3c83ff20c
commit 62a8a094b0
4 fájl változott, egészen pontosan 172 új sor hozzáadva és 4 régi sor törölve
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6
drivers/clk/tegra/clk-dfll.c
Fájl megtekintése

@@ -682,7 +682,7 @@ static int find_lut_index_for_rate(struct tegra_dfll *td, unsigned long rate)
struct dev_pm_opp *opp;
int i, uv;
opp = dev_pm_opp_find_freq_ceil(td->soc->opp_dev, &rate);
opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate);
if (IS_ERR(opp))
return PTR_ERR(opp);
uv = dev_pm_opp_get_voltage(opp);
@@ -1436,7 +1436,7 @@ static int dfll_build_i2c_lut(struct tegra_dfll *td)
rcu_read_lock();
rate = ULONG_MAX;
opp = dev_pm_opp_find_freq_floor(td->soc->opp_dev, &rate);
opp = dev_pm_opp_find_freq_floor(td->soc->dev, &rate);
if (IS_ERR(opp)) {
dev_err(td->dev, "couldn't get vmax opp, empty opp table?\n");
goto out;
@@ -1449,7 +1449,7 @@ static int dfll_build_i2c_lut(struct tegra_dfll *td)
goto out;
for (j = 1, rate = 0; ; rate++) {
opp = dev_pm_opp_find_freq_ceil(td->soc->opp_dev, &rate);
opp = dev_pm_opp_find_freq_ceil(td->soc->dev, &rate);
if (IS_ERR(opp))
break;
v_opp = dev_pm_opp_get_voltage(opp);